From nobody Tue Nov 26 13:22:56 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 848C25680; Thu, 17 Oct 2024 14:31:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729175513; cv=none; b=lTOTDOb5n/NG+9JQ3VG3WI5P2v+9MQW0XfiShZiMU3uT8eLGhZ7AkGIs2Y1Ky13uiPBOod0lLdqKE9BDyF0k9+MR+t+5tTt1D+e1iB1Bnw1r2aMeJ13wS5AwJ+w9p+Yfqrw4VAnByrGW9Djv1JV02zsYnh9wov3GX5V0ZoMHTm0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729175513; c=relaxed/simple; bh=SKDmrC6wxkBh0QMo8rcm+HsLNB4sdnUMvZwopu+gpCw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=u7efiAyEepQ4tUHu0jQ158dy89fLA6xCz++f4CQquGgA9Ub7ZH4w+syWrjOZECclvsnujn/G3K4ojQ34zW+sG6oBVynGjA9U+MiAxjh1EWv9zsaaWMcftjmN2JwjH6A1G/1Lksf1LeqWi1CdgyWppbHpgwV9eHqYU9CN9TEpURc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SlY91ZtE; arc=none smtp.client-ip=192.198.163.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SlY91ZtE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729175508; x=1760711508; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SKDmrC6wxkBh0QMo8rcm+HsLNB4sdnUMvZwopu+gpCw=; b=SlY91ZtEciJ+FbKwai2N8Ydj4WAOlOfVkxkzrTclfaHkLloQDQ+5aMQA Neqltmue6g32XvF4P/K8xVqCt2EsD5MJ8GViHZmCAr7Sxfg+sWpjajtzl 8b+KzUIhWlp1y1z4V5GMYSY8nJb2FY/eK21AvqKUfIAhBBhHFwczHpS4l NLXgvl5u1VDHZ3Ccf37ddM+F/UiuezrUf4se0FsvzhAywu+W45vOKwD8z MnhqanUiK8TcYdJK0JivH+RUoR40K0GXnXDeZiBlTKq7CJOT06hUCeKgx AT/rOBYFvFrEVsou5qQs0UbVWOHFStGFjF64NkDXp1AUZPK1Mdspj5Dzu Q==; X-CSE-ConnectionGUID: N+JJgMidQleuQoauBYqLEQ== X-CSE-MsgGUID: 94fZau+pQh2qFxiUupJU0g== X-IronPort-AV: E=McAfee;i="6700,10204,11228"; a="16281365" X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="16281365" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:31:47 -0700 X-CSE-ConnectionGUID: Wv8vvAAHR4q9jO27alDQGA== X-CSE-MsgGUID: PrUnzNQoTJKU4lXcRi46sg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="83394687" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.91]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:31:46 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 1/4] PCI: cpqphp: Fix PCIBIOS_* return value confusions Date: Thu, 17 Oct 2024 17:31:28 +0300 Message-Id: <20241017143131.46163-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241017143131.46163-1-ilpo.jarvinen@linux.intel.com> References: <20241017143131.46163-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Code in and related to PCI_RefinedAccessConfig() has 3 types of return type confusion: - PCI_RefinedAccessConfig() tests pci_bus_read_config_dword() return value against -1. - PCI_RefinedAccessConfig() returns both -1 and PCIBIOS_* return codes. - Callers of PCI_RefinedAccessConfig() only test for -1. Make PCI_RefinedAccessConfig() return PCIBIOS_* codes consistently and adapt callers accordingly. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/hotplug/cpqphp_pci.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/pci/hotplug/cpqphp_pci.c b/drivers/pci/hotplug/cpqphp_= pci.c index 718bc6cf12cb..974c7db3265b 100644 --- a/drivers/pci/hotplug/cpqphp_pci.c +++ b/drivers/pci/hotplug/cpqphp_pci.c @@ -135,11 +135,13 @@ int cpqhp_unconfigure_device(struct pci_func *func) static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn= , u8 offset, u32 *value) { u32 vendID =3D 0; + int ret; =20 - if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &vendID) =3D=3D = -1) - return -1; + ret =3D pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &vendID); + if (ret !=3D PCIBIOS_SUCCESSFUL) + return PCIBIOS_DEVICE_NOT_FOUND; if (PCI_POSSIBLE_ERROR(vendID)) - return -1; + return PCIBIOS_DEVICE_NOT_FOUND; return pci_bus_read_config_dword(bus, devfn, offset, value); } =20 @@ -202,13 +204,15 @@ static int PCI_ScanBusForNonBridge(struct controller = *ctrl, u8 bus_num, u8 *dev_ { u16 tdevice; u32 work; + int ret; u8 tbus; =20 ctrl->pci_bus->number =3D bus_num; =20 for (tdevice =3D 0; tdevice < 0xFF; tdevice++) { /* Scan for access first */ - if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) =3D=3D = -1) + ret =3D PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work); + if (ret) continue; dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice); /* Yep we got one. Not a bridge ? */ @@ -220,7 +224,8 @@ static int PCI_ScanBusForNonBridge(struct controller *c= trl, u8 bus_num, u8 *dev_ } for (tdevice =3D 0; tdevice < 0xFF; tdevice++) { /* Scan for access first */ - if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) =3D=3D = -1) + ret =3D PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work); + if (ret) continue; dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice); /* Yep we got one. bridge ? */ --=20 2.39.5 From nobody Tue Nov 26 13:22:56 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8EA111DE8A9; Thu, 17 Oct 2024 14:31:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729175520; cv=none; b=HInV0uaKIAfJWT5qKDwnsmG/Q9fJUSi7hpVBh1u8dGRzgjPSPP8gZuHhAy6zfzpX/OVXtIWLItKcD6ydq2NAtnKwt9pX6gm9nUjoydrkAjHA2/SeE6pBGcjCbPHi7bcMOEKFXG5pcA7gidgl3IhH467zfoADhz6r0xOT10uFjBk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729175520; c=relaxed/simple; bh=4LJ4d3l78k86ZkaKlk3S4ZkJk0tpxXAt6ZTjN54rH+w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=tI9HvuVUzFFifP+EXAF7z6V9fI8Tvz2GdWmc2cb5g5jfr2CPk4EkIUsDLkkO8qoGMO/nTOhVSS0+FS6nL+hUp0A7Qs8CZVMDIgT4AvsXHtReWRw3cZmUeIlWu7JsZXZcs0sdnPVMmtTnFj7X5dVya7RS5kkqaNve4HvlQoXt0QQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=lTD9PVm2; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lTD9PVm2" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729175515; x=1760711515; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4LJ4d3l78k86ZkaKlk3S4ZkJk0tpxXAt6ZTjN54rH+w=; b=lTD9PVm2V4B8+xZwKeUzFdXrkIVr5QtEAbCxRD458y/zAVUFvly9e/IO 0YNQDyuSOSxqMm0YdBwoISiAr3w0Oya4sW9Tec6x71gSh6c7lek065PvS ECwF+lbYeaCCDFlDD/qf06vhHCNOex//vicxvFYezGggqgtSzMS6PFlwf dvgZIfpYZdk0XTl8W0CEA/wa7F4daEpwYSMVOt6jHw5VL7EzpypD1TifZ AflsAq/P6eYytPdOLrKNPtdpi/mleo9Gm50X8+GAsVRJwUcmDb7fSKDMr gdWoXpg7/lVR5FJJwfU54SMoxMZLg7c2i6HU+7vEnx0MqoTBxcYhbguL7 Q==; X-CSE-ConnectionGUID: od2GbC7wRdqqwULIeqTcEA== X-CSE-MsgGUID: 0879va+zTBGdD0blJHyM8A== X-IronPort-AV: E=McAfee;i="6700,10204,11228"; a="32592298" X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="32592298" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:31:55 -0700 X-CSE-ConnectionGUID: bjZP1sdQS0CUVrrtEClglw== X-CSE-MsgGUID: IxDPdO0cRGuGkljaDjroFw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="116002544" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.91]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:31:53 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 2/4] PCI: cpqphp: Use pci_bus_read_dev_vendor_id() to detect presence Date: Thu, 17 Oct 2024 17:31:29 +0300 Message-Id: <20241017143131.46163-3-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241017143131.46163-1-ilpo.jarvinen@linux.intel.com> References: <20241017143131.46163-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The intent of the first part in PCI_RefinedAccessConfig() is to read Vendor ID register and detect presense of the device that way. Remove PCI_RefinedAccessConfig() (which was not named very helpfully to begin with) and replace the call with pci_bus_read_dev_vendor_id() + read config because it makes the logic more obvious at the caller side. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/hotplug/cpqphp_pci.c | 22 ++++++---------------- 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/drivers/pci/hotplug/cpqphp_pci.c b/drivers/pci/hotplug/cpqphp_= pci.c index 974c7db3265b..7844007dbc86 100644 --- a/drivers/pci/hotplug/cpqphp_pci.c +++ b/drivers/pci/hotplug/cpqphp_pci.c @@ -132,20 +132,6 @@ int cpqhp_unconfigure_device(struct pci_func *func) return 0; } =20 -static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn= , u8 offset, u32 *value) -{ - u32 vendID =3D 0; - int ret; - - ret =3D pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &vendID); - if (ret !=3D PCIBIOS_SUCCESSFUL) - return PCIBIOS_DEVICE_NOT_FOUND; - if (PCI_POSSIBLE_ERROR(vendID)) - return PCIBIOS_DEVICE_NOT_FOUND; - return pci_bus_read_config_dword(bus, devfn, offset, value); -} - - /* * cpqhp_set_irq * @@ -211,7 +197,9 @@ static int PCI_ScanBusForNonBridge(struct controller *c= trl, u8 bus_num, u8 *dev_ =20 for (tdevice =3D 0; tdevice < 0xFF; tdevice++) { /* Scan for access first */ - ret =3D PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work); + if (!pci_bus_read_dev_vendor_id(ctrl->pci_bus, tdevice, &work, 0)) + continue; + ret =3D pci_bus_read_config_dword(ctrl->pci_bus, tdevice, 0x08, &work); if (ret) continue; dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice); @@ -224,7 +212,9 @@ static int PCI_ScanBusForNonBridge(struct controller *c= trl, u8 bus_num, u8 *dev_ } for (tdevice =3D 0; tdevice < 0xFF; tdevice++) { /* Scan for access first */ - ret =3D PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work); + if (!pci_bus_read_dev_vendor_id(ctrl->pci_bus, tdevice, &work, 0)) + continue; + ret =3D pci_bus_read_config_dword(ctrl->pci_bus, tdevice, 0x08, &work); if (ret) continue; dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice); --=20 2.39.5 From nobody Tue Nov 26 13:22:56 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D5311DED56; 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X-CSE-ConnectionGUID: iWLTogtaR1+/mG0J6xEjSw== X-CSE-MsgGUID: zm9xmKg0RXuQ2tw1PXsDOQ== X-IronPort-AV: E=McAfee;i="6700,10204,11228"; a="32592329" X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="32592329" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:32:02 -0700 X-CSE-ConnectionGUID: vcRea9/YTIenFuap/I1qJQ== X-CSE-MsgGUID: PCksBMQrQpimStzLVp13rA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,211,1725346800"; d="scan'208";a="116002556" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.91]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:32:00 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 3/4] PCI: cpqphp: Use define to read class/revision dword Date: Thu, 17 Oct 2024 17:31:30 +0300 Message-Id: <20241017143131.46163-4-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241017143131.46163-1-ilpo.jarvinen@linux.intel.com> References: <20241017143131.46163-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Replace literal 0x08 with PCI_CLASS_REVISION. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/hotplug/cpqphp_pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/hotplug/cpqphp_pci.c b/drivers/pci/hotplug/cpqphp_= pci.c index 7844007dbc86..558866c15e03 100644 --- a/drivers/pci/hotplug/cpqphp_pci.c +++ b/drivers/pci/hotplug/cpqphp_pci.c @@ -199,7 +199,7 @@ static int PCI_ScanBusForNonBridge(struct controller *c= trl, u8 bus_num, u8 *dev_ /* Scan for access first */ if (!pci_bus_read_dev_vendor_id(ctrl->pci_bus, tdevice, &work, 0)) continue; - ret =3D pci_bus_read_config_dword(ctrl->pci_bus, tdevice, 0x08, &work); + ret =3D pci_bus_read_config_dword(ctrl->pci_bus, tdevice, PCI_CLASS_REVI= SION, &work); if (ret) continue; dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice); @@ -214,7 +214,7 @@ static int PCI_ScanBusForNonBridge(struct controller *c= trl, u8 bus_num, u8 *dev_ /* Scan for access first */ if (!pci_bus_read_dev_vendor_id(ctrl->pci_bus, tdevice, &work, 0)) continue; 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d="scan'208";a="116002570" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.91]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 07:32:08 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 4/4] PCI: cpqphp: Simplify PCI_ScanBusForNonBridge() Date: Thu, 17 Oct 2024 17:31:31 +0300 Message-Id: <20241017143131.46163-5-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241017143131.46163-1-ilpo.jarvinen@linux.intel.com> References: <20241017143131.46163-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable PCI_ScanBusForNonBridge() has two loops, first searching for non-bridges and second that looks for bridges. The second loop has hints in a debug print it should do recursion for buses underneath the bridge but no recursion is attempted. Since the second loop is quite useless in its current form, just eliminate it. This code hasn't been touched for very long time so either it's unused or the missing parts are not important enough for anyone to attempt to add them. Leave only a simple comment about the missing recursion for the unlikely case that somebody comes across the lack of functionality. In any case, search whether an endpoint exists downstream of a bridge sounds generic enough to belong to core so if the functionality is to be extended it should probably be moved into PCI core. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/hotplug/cpqphp_pci.c | 30 +++++++++++------------------- 1 file changed, 11 insertions(+), 19 deletions(-) diff --git a/drivers/pci/hotplug/cpqphp_pci.c b/drivers/pci/hotplug/cpqphp_= pci.c index 558866c15e03..b2efc4a90864 100644 --- a/drivers/pci/hotplug/cpqphp_pci.c +++ b/drivers/pci/hotplug/cpqphp_pci.c @@ -190,8 +190,7 @@ static int PCI_ScanBusForNonBridge(struct controller *c= trl, u8 bus_num, u8 *dev_ { u16 tdevice; u32 work; - int ret; - u8 tbus; + int ret =3D -1; =20 ctrl->pci_bus->number =3D bus_num; =20 @@ -208,26 +207,19 @@ static int PCI_ScanBusForNonBridge(struct controller = *ctrl, u8 bus_num, u8 *dev_ *dev_num =3D tdevice; dbg("found it !\n"); return 0; - } - } - for (tdevice =3D 0; tdevice < 0xFF; tdevice++) { - /* Scan for access first */ - if (!pci_bus_read_dev_vendor_id(ctrl->pci_bus, tdevice, &work, 0)) - continue; - ret =3D pci_bus_read_config_dword(ctrl->pci_bus, tdevice, PCI_CLASS_REVI= SION, &work); - if (ret) - continue; - dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice); - /* Yep we got one. bridge ? */ - if ((work >> 8) =3D=3D PCI_TO_PCI_BRIDGE_CLASS) { - pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECO= NDARY_BUS, &tbus); - /* XXX: no recursion, wtf? */ - dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice); - return 0; + } else { + /* + * XXX: Code whose debug printout indicated + * recursion to buses underneath bridges might be + * necessary was removed because it never did + * any recursion. + */ + ret =3D 0; } } =20 - return -1; + + return ret; } =20 =20 --=20 2.39.5