From nobody Tue Nov 26 17:39:01 2024 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3348F1DD531; Thu, 17 Oct 2024 10:28:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729160893; cv=none; b=X63eeYwStJfKd9PqHjwJJNa6JmVt2hBZ8lNJ/o4/17WIUEnL8KB5FDd7x4V80ADjyLdOl3wpriJP3gPlTQwhcUqk3XosQ8gIgFltVexVD0/heU+pQOaQtyJyDWJiW4k6g8GSXN4hQT8Sf9vWKC/WYPNvkTppMvzqjZDv/CeOv7o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729160893; c=relaxed/simple; bh=nTDeq+Sh2IUDrtlvE75CGZP82looY+bIra0neGcZuTU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=IX+JNhcJBOe8FW96amzDO6LhFgG9F3Rhm9OZReVhOH70Q4tbUeBYWe4MLhzgsc1KXZ92s6aCpHy7PthjX50EnXxoSqJfLy2T53XSJzn2VwYe82D9iZ73Hj70XmL+DGwN0QO91w8/IIMc6WlZcpDcq7HjZQi7zb/1U+4yLgaB2h0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=MtAC5YxY; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="MtAC5YxY" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49H8lDqH012503; Thu, 17 Oct 2024 10:28:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= +VzVPF8s5VIQJw83eLdCENfmWZ+1IC6yLrNQVrd9nzA=; b=MtAC5YxYuHVPWBkH bvGXC/KyPiBItZ4nQ5VG9pT1yX0kt8R68FH01uVUDateEd1oAhu8wU/LtyiiNNZX m+UCttFsSmt2c9YbjuYljK0rA0gRi9tyozKP1hqAekgCDEUgTAf53pSTu/KdjNTw KqqJHUe3kmh8K7az1kVWdkSVGkf5MWyzduy2/dWrVa1nj9VGvz6h/dTYIug3KSE4 VyGVhI5lnrdALU9/MkndoxaEjbtbPNVYhrJs4rfzyb5vgY8MXURIC5/ADK64mXUs B0QWFnSpnyGQj/Bp7F0yQG1gqjca95Mh+eWpENuT4PRH+hgZUHoyi9jRfFLbWeHO SAiAVA== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 42abbxuqgd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 17 Oct 2024 10:28:05 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49HAS3B0002881 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 17 Oct 2024 10:28:03 GMT Received: from yijiyang-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 17 Oct 2024 03:27:59 -0700 From: YijieYang To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran CC: , , , , , , Yijie Yang Subject: [PATCH v2 5/5] arm64: dts: qcom: qcs8300-ride-r2: add new board file Date: Thu, 17 Oct 2024 18:27:28 +0800 Message-ID: <20241017102728.2844274-6-quic_yijiyang@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241017102728.2844274-1-quic_yijiyang@quicinc.com> References: <20241017102728.2844274-1-quic_yijiyang@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: fQx_cR1v1m_GLaFHMv25hDjW5N_hRw9t X-Proofpoint-GUID: fQx_cR1v1m_GLaFHMv25hDjW5N_hRw9t X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 mlxscore=0 mlxlogscore=999 bulkscore=0 spamscore=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410170071 Content-Type: text/plain; charset="utf-8" From: Yijie Yang Revision 2 of the qcs8300-ride board uses a different PHY for the two ethernet ports and supports 2.5G speed. Create a new file for the board reflecting the changes. Signed-off-by: Yijie Yang Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/qcs8300-ride-r2.dts | 33 ++++++++++++++++++++ 2 files changed, 34 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs8300-ride-r2.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index b69be54829ea..65c69f30e0b5 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -112,6 +112,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-rb3gen2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs8300-ride.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D qcs8300-ride-r2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs8550-aim300-aiot.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qdu1000-idp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qrb2210-rb1.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride-r2.dts b/arch/arm64/boot= /dts/qcom/qcs8300-ride-r2.dts new file mode 100644 index 000000000000..e8bf4668b70e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride-r2.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "qcs8300-ride.dtsi" +/ { + model =3D "Qualcomm Technologies, Inc. QCS8300 Ride Rev2"; + compatible =3D "qcom,qcs8300-ride-r2", "qcom,qcs8300"; + chassis-type =3D "embedded"; +}; + +ðernet0 { + phy-mode =3D "2500base-x"; +}; + +&mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + sgmii_phy0: phy@8 { + compatible =3D "ethernet-phy-id31c3.1c33"; + reg =3D <0x8>; + device_type =3D "ethernet-phy"; + interrupts-extended =3D <&tlmm 4 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&tlmm 31 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <11000>; + reset-deassert-us =3D <70000>; + }; +}; --=20 2.34.1