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PATCH v1] pinctrl: mediatek: paris: Revert "Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLE" Date: Thu, 17 Oct 2024 17:14:09 +0800 Message-ID: <20241017091410.181093-1-bo.ye@mediatek.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20241017091238.180920-1-bo.ye@mediatek.com> References: <20241017091238.180920-1-bo.ye@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" [This reverts commit c5d3b64c568a344e998830e0e94a7c04e372f89b.] For MTK HW, 1. to enable GPIO input direction: set DIR=3D0, IES=3D1 2. to enable GPIO output direction: set DIR=3D1, and set DO=3D1 to output h= igh, set DO=3D0 to out low The PIN_CONFIG_INPUT/PIN_CONFIG_OUTPUT/PIN_CONFIG_INPUT_ENABLE/PIN_CONFIG_O= UTPUT_ENABLE shall be implemented according to view of its purpose - set GPIO direction and ou= tput value (for output only) according to specific HW design. However, the reverted patch implement according to author's own explanation= of IES without understanding of MTK's HW. Such patch does not correctly set DIR/IES bit to= control GPIO direction on MTK's HW. Fixes: c5d3b64c568 ("pinctrl: mediatek: paris: Rework support for PIN_CONFI= G_{INPUT,OUTPUT}_ENABLE") Signed-off-by: Light Hsieh Signed-off-by: Evan Cao Signed-off-by: Bo Ye --- drivers/pinctrl/mediatek/pinctrl-paris.c | 38 +++++++++++++++++------- 1 file changed, 27 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/med= iatek/pinctrl-paris.c index 87e958d827bf..a8af62e6f8ca 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -165,21 +165,20 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctlde= v, err =3D mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret); break; case PIN_CONFIG_INPUT_ENABLE: - err =3D mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_IES, &ret); - if (!ret) - err =3D -EINVAL; - break; - case PIN_CONFIG_OUTPUT: + case PIN_CONFIG_OUTPUT_ENABLE: err =3D mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); if (err) break; + /* CONFIG Current direction return value + * ------------- ----------------- ---------------------- + * OUTPUT_ENABLE output 1 (=3D HW value) + * input 0 (=3D HW value) + * INPUT_ENABLE output 0 (=3D reverse HW value) + * input 1 (=3D reverse HW value) + */ + if (param =3D=3D PIN_CONFIG_INPUT_ENABLE) + ret =3D !ret; =20 - if (!ret) { - err =3D -EINVAL; - break; - } - - err =3D mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DO, &ret); break; case PIN_CONFIG_INPUT_SCHMITT_ENABLE: err =3D mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); @@ -284,9 +283,26 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev= , unsigned int pin, break; err =3D hw->soc->bias_set_combo(hw, desc, 0, arg); break; + case PIN_CONFIG_OUTPUT_ENABLE: + err =3D mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, + MTK_DISABLE); + /* Keep set direction to consider the case that a GPIO pin + * does not have SMT control + */ + if (err !=3D -ENOTSUPP) + break; + + err =3D mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, + MTK_OUTPUT); + break; case PIN_CONFIG_INPUT_ENABLE: /* regard all non-zero value as enable */ err =3D mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg); + if (err) + break; + + err =3D mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, + MTK_INPUT); break; case PIN_CONFIG_SLEW_RATE: /* regard all non-zero value as enable */ --=20 2.17.0