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No functional change. Signed-off-by: Frank Li --- - rework commit message. --- drivers/edac/fsl_ddr_edac.c | 21 +++++++++------------ drivers/edac/fsl_ddr_edac.h | 3 +++ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/edac/fsl_ddr_edac.c b/drivers/edac/fsl_ddr_edac.c index 9924c6b816648..7a9fb1202f1a0 100644 --- a/drivers/edac/fsl_ddr_edac.c +++ b/drivers/edac/fsl_ddr_edac.c @@ -31,22 +31,18 @@ =20 static int edac_mc_idx; =20 -static u32 orig_ddr_err_disable; -static u32 orig_ddr_err_sbe; -static bool little_endian; - static inline u32 ddr_in32(struct fsl_mc_pdata *pdata, unsigned int off) { void __iomem *addr =3D pdata->mc_vbase + off; =20 - return little_endian ? ioread32(addr) : ioread32be(addr); + return pdata->little_endian ? ioread32(addr) : ioread32be(addr); } =20 static inline void ddr_out32(struct fsl_mc_pdata *pdata, unsigned int off,= u32 value) { void __iomem *addr =3D pdata->mc_vbase + off; =20 - if (little_endian) + if (pdata->little_endian) iowrite32(value, addr); else iowrite32be(value, addr); @@ -511,7 +507,7 @@ int fsl_mc_err_probe(struct platform_device *op) * Get the endianness of DDR controller registers. * Default is big endian. */ - little_endian =3D of_property_read_bool(op->dev.of_node, "little-endian"); + pdata->little_endian =3D of_property_read_bool(op->dev.of_node, "little-e= ndian"); =20 res =3D of_address_to_resource(op->dev.of_node, 0, &r); if (res) { @@ -562,7 +558,7 @@ int fsl_mc_err_probe(struct platform_device *op) fsl_ddr_init_csrows(mci); =20 /* store the original error disable bits */ - orig_ddr_err_disable =3D ddr_in32(pdata, FSL_MC_ERR_DISABLE); + pdata->orig_ddr_err_disable =3D ddr_in32(pdata, FSL_MC_ERR_DISABLE); ddr_out32(pdata, FSL_MC_ERR_DISABLE, 0); =20 /* clear all error bits */ @@ -579,8 +575,8 @@ int fsl_mc_err_probe(struct platform_device *op) DDR_EIE_MBEE | DDR_EIE_SBEE); =20 /* store the original error management threshold */ - orig_ddr_err_sbe =3D ddr_in32(pdata, - FSL_MC_ERR_SBE) & 0xff0000; + pdata->orig_ddr_err_sbe =3D ddr_in32(pdata, + FSL_MC_ERR_SBE) & 0xff0000; =20 /* set threshold to 1 error per interrupt */ ddr_out32(pdata, FSL_MC_ERR_SBE, 0x10000); @@ -628,8 +624,9 @@ void fsl_mc_err_remove(struct platform_device *op) } =20 ddr_out32(pdata, FSL_MC_ERR_DISABLE, - orig_ddr_err_disable); - ddr_out32(pdata, FSL_MC_ERR_SBE, orig_ddr_err_sbe); + pdata->orig_ddr_err_disable); + ddr_out32(pdata, FSL_MC_ERR_SBE, pdata->orig_ddr_err_sbe); + =20 edac_mc_del_mc(&op->dev); edac_mc_free(mci); diff --git a/drivers/edac/fsl_ddr_edac.h b/drivers/edac/fsl_ddr_edac.h index c0994a2a003c2..de66f9822fba1 100644 --- a/drivers/edac/fsl_ddr_edac.h +++ b/drivers/edac/fsl_ddr_edac.h @@ -70,6 +70,9 @@ struct fsl_mc_pdata { int edac_idx; void __iomem *mc_vbase; int irq; + u32 orig_ddr_err_disable; + u32 orig_ddr_err_sbe; + bool little_endian; }; int fsl_mc_err_probe(struct platform_device *op); void fsl_mc_err_remove(struct platform_device *op); --=20 2.34.1