From nobody Tue Nov 26 21:27:58 2024 Received: from out-02.smtp.spacemail.com (out-02.smtp.spacemail.com [63.250.43.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1966B1FBF54; Tue, 15 Oct 2024 21:05:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026309; cv=none; b=F1hJ+gK3JgzHAnPCppjSZdFWLDE0MijVcF3j0KaS1ckc/bztJTeSvjOH9t5krzAEic2ZJVh/SXYWAxIlUw5IfTsgm7o1MPLw7Af8a4A5KfMqScK+VqTEINVp2JWQ9Sjo7lOPgDq65wML830JIo08aPNpy6KTYYPiRpVG/6HS/gs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026309; c=relaxed/simple; bh=gUlS1i8qx/2ojHqYIjPj+RLbxOrGmJfLGOal1pufpCw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qG26uIUF25IF4J0u9pE3WYnvOLKhnu3mfJDrQkLxpwhewU1O4/EhLuV0E0gyHzx0I9fEfWzW5qAjX+nb7rRpVhiYmr1HnzqKVX1Y8vTmNmnK05JXql7DYoH/SnwAjGj3e77JQrfgBGQwsWbKc+GhL7TkuqgdL5Y/O2jRGS009Pw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=iSj3Xgnm; arc=none smtp.client-ip=63.250.43.87 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="iSj3Xgnm" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSmnt6YGxz4wK0; Tue, 15 Oct 2024 21:05:06 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSmnl0tMSz8sWN; Tue, 15 Oct 2024 21:04:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1729026301; bh=gUlS1i8qx/2ojHqYIjPj+RLbxOrGmJfLGOal1pufpCw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iSj3Xgnmigm6IOrV869peAuxV7eXcHTvDjEgdZIxh3CfvHTwv04/kwf7Kp5IPyW5Q 2ingprdelHIg0oAL00F+tAuIMAIPEfOQXGJUmHyqjfVMTWmAHgKV5zj6sRiwoO54Mo nBDOUvUegN0iJNgztieBHQ9i6sxRl+/Rtv3aNsAUsbv8UVefK0B6NAZdU4tsmmueHU l0AfpdUhpDEIMclcluW37hZZuk7FeFuA6lGxPxldEE2zXI9TpO7UZ80bg/U+688pCi 43OAg5OKoecWq5VLjP4PwuCK+7YpxXzUGi+dd8GSy/WTs5k4vML7KWfVNr6rPzM3gy x++WPCq+oKRhw== From: Igor Belwon To: Krzysztof Kozlowski , Sylwester Nawrocki , Alim Akhtar , Linus Walleij , Rob Herring , Conor Dooley , Tomasz Figa Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/5] dt-bindings: pinctrl: samsung: Add exynos990-pinctrl compatible Date: Tue, 15 Oct 2024 23:04:46 +0200 Message-ID: <20241015210450.964093-2-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> References: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a dedicated compatible for the exynos990-pinctrl node. Signed-off-by: Igor Belwon --- Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml= b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index a2af2c88a331..7e6ef8249de6 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -54,6 +54,7 @@ properties: - samsung,exynos7885-pinctrl - samsung,exynos850-pinctrl - samsung,exynos8895-pinctrl + - samsung,exynos990-pinctrl - samsung,exynosautov9-pinctrl - samsung,exynosautov920-pinctrl - tesla,fsd-pinctrl --=20 2.45.2 From nobody Tue Nov 26 21:27:58 2024 Received: from out-02.smtp.spacemail.com (out-02.smtp.spacemail.com [63.250.43.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33CFE1FE103; Tue, 15 Oct 2024 21:05:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026312; cv=none; b=i0Y+NYx1zaWGkF38+9azYh47x+ttQnhR1Al/Gni6lUakEokXPXpgUvtWteDICpQo1aXARYBaHLPWZXStQz/4tuhXLE1gnBR12Mh3DJvGz3CIg3pLVDJSaqW9cODLBwrfnwtKcO88TeGqoqK/axTpxBy+Y8bN4EM0U8HvnY78A/w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026312; c=relaxed/simple; bh=JpRWW4hEuXyr+dOavz4imNsnkeY0yV1ki8FOJUM9jB8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MkIrEg54mpE+kbYvfMXSF4dAbfD8NpTyOJBVRPWiSHp2vXACmQ2bj9u6hN04zFR9Qqqt+2Ykb2kdfzOeYT4TKb6lMAM7qDbvVDY5Lub54+bn2YTJhFJESvAgjlZC412rjD9ZpcjLhGxVpO8tTiYIY8AYbQKa/3YQn2FAmchV+ag= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=jnqE49BQ; arc=none smtp.client-ip=63.250.43.87 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="jnqE49BQ" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSmnx6f4jz4w5K; Tue, 15 Oct 2024 21:05:09 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSmnp14m9z8sWQ; Tue, 15 Oct 2024 21:05:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1729026304; bh=JpRWW4hEuXyr+dOavz4imNsnkeY0yV1ki8FOJUM9jB8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jnqE49BQL+HTCHPVl026Vo/TiS8Hq8BS+2I4Yass7BhngNZBBs+xj1DH+eyZZkIc0 eq9Jzf7WjfKrjuSW92AY5bAX/88pfTTIl42i+U+OprJuamuho8zsKcpIltJ5gcs/6y PEOVj9lfYCiN+DD2a9qaeKxUwYv4gbJn9TwVL3GcQ1BhkbWYuI4awwRT4TBLRZltLO faB3axN/f6HfDrCC9au0Gd6iCuv0mhNGTNs8wcDUL7SxQFEPCNJTEjSd/nuVUuKY9x yYSLGRmgstvWgjBHmpylfPBLh2Luwyyu7nTuu52QpMuKbt6TjKyCK12IGgUb70mypJ /L1Ryf6dHUDHw== From: Igor Belwon To: Krzysztof Kozlowski , Sylwester Nawrocki , Alim Akhtar , Linus Walleij , Rob Herring , Conor Dooley , Tomasz Figa Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/5] dt-bindings: pinctrl: samsung: add exynos990-wakeup-eint compatible Date: Tue, 15 Oct 2024 23:04:47 +0200 Message-ID: <20241015210450.964093-3-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> References: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a dedicated compatible for the exynos990-wakeup-eint node. Signed-off-by: Igor Belwon --- .../bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wake= up-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinct= rl-wakeup-interrupt.yaml index b7c2692f0ac3..565cacadb6be 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-inte= rrupt.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-inte= rrupt.yaml @@ -47,6 +47,7 @@ properties: - items: - enum: - google,gs101-wakeup-eint + - samsung,exynos990-wakeup-eint - samsung,exynosautov9-wakeup-eint - const: samsung,exynos850-wakeup-eint - const: samsung,exynos7-wakeup-eint --=20 2.45.2 From nobody Tue Nov 26 21:27:58 2024 Received: from out-02.smtp.spacemail.com (out-02.smtp.spacemail.com [63.250.43.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13A151FF032; Tue, 15 Oct 2024 21:05:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026316; cv=none; b=tvk/rDHiyI7/CJsU5dmaS68j7HxZWxw84cLVffDeO5qFlQXWA9wvlfwBGzb+PkAY1rCBp3C85Q3ajO5ovcjlxlaqtolE7eKq/gJZ/i5OxCQqo9VNeapzauue+1OlwfZ7vDPJN5sujh/DJiWY/RHPf892mSCuY6IaX76HsaOcuxA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026316; c=relaxed/simple; bh=XP0QwWuwa4XJriZLCfnu3pR+wy2G1Sg+CRRjs2JmONs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f4Z1jLBKF1AYlkdjniMHDbm16XuiiS+ynkb0M3N9toT4uQPYfWGjLnZj9QzZFxEsLcZX/mFXI8TzOhb1xiEAk3wjmos9jLoRrMklnFx+DY/qv9udt/ifRMV4z5rsXb7zyTFVtdMdIxos+0BVjsMf5oTjdcGnDZ9hbcBCArR/rQ0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=QXr+0rFn; arc=none smtp.client-ip=63.250.43.87 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="QXr+0rFn" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSmp06bmQz4wK0; Tue, 15 Oct 2024 21:05:12 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSmns12yTz8sWP; Tue, 15 Oct 2024 21:05:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1729026307; bh=XP0QwWuwa4XJriZLCfnu3pR+wy2G1Sg+CRRjs2JmONs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QXr+0rFnUQXCqHDBJ8v79g+N4HTo6Kuyobkmoa5KHfcAzU5g10BR9gaZuFVYa5vz9 Kmpt90RMDx4s5nJpzlQ57em5gl+eblMvm0HnaWM++DoUgs/hpE3ftXUvxLC+1INctc ntbrO6oo6sNrOF5cwm9Ge0viC2a+y1vmh1AgGa66FixmhM8GckjlVVi4CuPz+ldQYO tMMmq4/26zV20dwinR+5sSmuGtef64dgxhRD0MJ8FhXsFo9VZw/CsQUZ+IFm8+aMKB liqlzAg2hUtbO4yWpg3/iu0GxC35cX4M0vwrYPcBZZ4dV22br85cC356LG1BZ7NlC/ YosXw0muJg1kg== From: Igor Belwon To: Krzysztof Kozlowski , Sylwester Nawrocki , Alim Akhtar , Linus Walleij , Rob Herring , Conor Dooley , Tomasz Figa Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/5] pinctrl: samsung: Add Exynos 990 SoC pinctrl configuration Date: Tue, 15 Oct 2024 23:04:48 +0200 Message-ID: <20241015210450.964093-4-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> References: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add SoC pinctrl configuration for the Exynos 990. The bank types used are the same as Exynos 850, so we can reuse its macros. Signed-off-by: Igor Belwon --- .../pinctrl/samsung/pinctrl-exynos-arm64.c | 140 ++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 3 files changed, 143 insertions(+) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinct= rl/samsung/pinctrl-exynos-arm64.c index c5df4f1bc600..f07c26d37442 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c @@ -627,6 +627,146 @@ const struct samsung_pinctrl_of_match_data exynos850_= of_data __initconst =3D { .num_ctrl =3D ARRAY_SIZE(exynos850_pin_ctrl), }; =20 +/* pin banks of exynos990 pin-controller 0 (ALIVE) */ +static struct samsung_pin_bank_data exynos990_pin_banks0[] =3D { + /* Must start with EINTG banks, ordered by EINT group number. */ + EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00), + EXYNOS850_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04), + EXYNOS850_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08), + EXYNOS850_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c), + EXYNOS850_PIN_BANK_EINTW(2, 0x080, "gpa4", 0x10), + EXYNOS850_PIN_BANK_EINTN(7, 0x0A0, "gpq0"), +}; + +/* pin banks of exynos990 pin-controller 1 (CMGP) */ +static struct samsung_pin_bank_data exynos990_pin_banks1[] =3D { + /* Must start with EINTG banks, ordered by EINT group number. */ + EXYNOS850_PIN_BANK_EINTN(1, 0x000, "gpm0"), + EXYNOS850_PIN_BANK_EINTN(1, 0x020, "gpm1"), + EXYNOS850_PIN_BANK_EINTN(1, 0x040, "gpm2"), + EXYNOS850_PIN_BANK_EINTN(1, 0x060, "gpm3"), + EXYNOS850_PIN_BANK_EINTW(1, 0x080, "gpm4", 0x00), + EXYNOS850_PIN_BANK_EINTW(1, 0x0A0, "gpm5", 0x04), + EXYNOS850_PIN_BANK_EINTW(1, 0x0C0, "gpm6", 0x08), + EXYNOS850_PIN_BANK_EINTW(1, 0x0E0, "gpm7", 0x0c), + EXYNOS850_PIN_BANK_EINTW(1, 0x100, "gpm8", 0x10), + EXYNOS850_PIN_BANK_EINTW(1, 0x120, "gpm9", 0x14), + EXYNOS850_PIN_BANK_EINTW(1, 0x140, "gpm10", 0x18), + EXYNOS850_PIN_BANK_EINTW(1, 0x160, "gpm11", 0x1c), + EXYNOS850_PIN_BANK_EINTW(1, 0x180, "gpm12", 0x20), + EXYNOS850_PIN_BANK_EINTW(1, 0x1A0, "gpm13", 0x24), + EXYNOS850_PIN_BANK_EINTW(1, 0x1C0, "gpm14", 0x28), + EXYNOS850_PIN_BANK_EINTW(1, 0x1E0, "gpm15", 0x2c), + EXYNOS850_PIN_BANK_EINTW(1, 0x200, "gpm16", 0x30), + EXYNOS850_PIN_BANK_EINTW(1, 0x220, "gpm17", 0x34), + EXYNOS850_PIN_BANK_EINTW(1, 0x240, "gpm18", 0x38), + EXYNOS850_PIN_BANK_EINTW(1, 0x260, "gpm19", 0x3c), + EXYNOS850_PIN_BANK_EINTW(1, 0x280, "gpm20", 0x40), + EXYNOS850_PIN_BANK_EINTW(1, 0x2A0, "gpm21", 0x44), + EXYNOS850_PIN_BANK_EINTW(1, 0x2C0, "gpm22", 0x48), + EXYNOS850_PIN_BANK_EINTW(1, 0x2E0, "gpm23", 0x4c), + EXYNOS850_PIN_BANK_EINTW(1, 0x300, "gpm24", 0x50), + EXYNOS850_PIN_BANK_EINTW(1, 0x320, "gpm25", 0x54), + EXYNOS850_PIN_BANK_EINTW(1, 0x340, "gpm26", 0x58), + EXYNOS850_PIN_BANK_EINTW(1, 0x360, "gpm27", 0x5c), + EXYNOS850_PIN_BANK_EINTW(1, 0x380, "gpm28", 0x60), + EXYNOS850_PIN_BANK_EINTW(1, 0x3A0, "gpm29", 0x64), + EXYNOS850_PIN_BANK_EINTW(1, 0x3C0, "gpm30", 0x68), + EXYNOS850_PIN_BANK_EINTW(1, 0x3E0, "gpm31", 0x6c), + EXYNOS850_PIN_BANK_EINTW(1, 0x400, "gpm32", 0x70), + EXYNOS850_PIN_BANK_EINTW(1, 0x420, "gpm33", 0x74), + +}; + +/* pin banks of exynos990 pin-controller 2 (HSI1) */ +static struct samsung_pin_bank_data exynos990_pin_banks2[] =3D { + /* Must start with EINTG banks, ordered by EINT group number. */ + EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpf0", 0x00), + EXYNOS850_PIN_BANK_EINTG(6, 0x020, "gpf1", 0x04), + EXYNOS850_PIN_BANK_EINTG(3, 0x040, "gpf2", 0x08), +}; + +/* pin banks of exynos990 pin-controller 3 (HSI2) */ +static struct samsung_pin_bank_data exynos990_pin_banks3[] =3D { + /* Must start with EINTG banks, ordered by EINT group number. */ + EXYNOS850_PIN_BANK_EINTG(2, 0x000, "gpf3", 0x00), +}; + +/* pin banks of exynos990 pin-controller 4 (PERIC0) */ +static struct samsung_pin_bank_data exynos990_pin_banks4[] =3D { + /* Must start with EINTG banks, ordered by EINT group number. */ + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp0", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp1", 0x04), + EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp2", 0x08), + EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpp3", 0x0C), + EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpp4", 0x10), + EXYNOS850_PIN_BANK_EINTG(2, 0x0A0, "gpg0", 0x14), +}; + +/* pin banks of exynos990 pin-controller 5 (PERIC1) */ +static struct samsung_pin_bank_data exynos990_pin_banks5[] =3D { + /* Must start with EINTG banks, ordered by EINT group number. */ + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp5", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp6", 0x04), + EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp7", 0x08), + EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpp8", 0x0C), + EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpp9", 0x10), + EXYNOS850_PIN_BANK_EINTG(6, 0x0A0, "gpc0", 0x14), + EXYNOS850_PIN_BANK_EINTG(4, 0x0C0, "gpg1", 0x18), + EXYNOS850_PIN_BANK_EINTG(8, 0x0E0, "gpb0", 0x1C), + EXYNOS850_PIN_BANK_EINTG(8, 0x100, "gpb1", 0x20), + EXYNOS850_PIN_BANK_EINTG(8, 0x120, "gpb2", 0x24), +}; + +/* pin banks of exynos990 pin-controller 6 (VTS) */ +static struct samsung_pin_bank_data exynos990_pin_banks6[] =3D { + /* Must start with EINTG banks, ordered by EINT group number. */ + EXYNOS850_PIN_BANK_EINTG(7, 0x000, "gpv0", 0x00), +}; + +static const struct samsung_pin_ctrl exynos990_pin_ctrl[] __initconst =3D { + { + /* pin-controller instance 0 ALIVE data */ + .pin_banks =3D exynos990_pin_banks0, + .nr_banks =3D ARRAY_SIZE(exynos990_pin_banks0), + .eint_wkup_init =3D exynos_eint_wkup_init, + }, { + /* pin-controller instance 1 CMGP data */ + .pin_banks =3D exynos990_pin_banks1, + .nr_banks =3D ARRAY_SIZE(exynos990_pin_banks1), + .eint_wkup_init =3D exynos_eint_wkup_init, + }, { + /* pin-controller instance 2 HSI1 data */ + .pin_banks =3D exynos990_pin_banks2, + .nr_banks =3D ARRAY_SIZE(exynos990_pin_banks2), + .eint_gpio_init =3D exynos_eint_gpio_init, + }, { + /* pin-controller instance 3 HSI2 data */ + .pin_banks =3D exynos990_pin_banks3, + .nr_banks =3D ARRAY_SIZE(exynos990_pin_banks3), + .eint_gpio_init =3D exynos_eint_gpio_init, + }, { + /* pin-controller instance 4 PERIC0 data */ + .pin_banks =3D exynos990_pin_banks4, + .nr_banks =3D ARRAY_SIZE(exynos990_pin_banks4), + .eint_gpio_init =3D exynos_eint_gpio_init, + }, { + /* pin-controller instance 5 PERIC1 data */ + .pin_banks =3D exynos990_pin_banks5, + .nr_banks =3D ARRAY_SIZE(exynos990_pin_banks5), + .eint_gpio_init =3D exynos_eint_gpio_init, + }, { + /* pin-controller instance 6 VTS data */ + .pin_banks =3D exynos990_pin_banks6, + .nr_banks =3D ARRAY_SIZE(exynos990_pin_banks6), + }, +}; + +const struct samsung_pinctrl_of_match_data exynos990_of_data __initconst = =3D { + .ctrl =3D exynos990_pin_ctrl, + .num_ctrl =3D ARRAY_SIZE(exynos990_pin_ctrl), +}; + /* pin banks of exynosautov9 pin-controller 0 (ALIVE) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks0[] __init= const =3D { EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00), diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/sa= msung/pinctrl-samsung.c index 86c7de109bca..42e40860841b 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1479,6 +1479,8 @@ static const struct of_device_id samsung_pinctrl_dt_m= atch[] =3D { .data =3D &exynos850_of_data }, { .compatible =3D "samsung,exynos8895-pinctrl", .data =3D &exynos8895_of_data }, + { .compatible =3D "samsung,exynos990-pinctrl", + .data =3D &exynos990_of_data }, { .compatible =3D "samsung,exynosautov9-pinctrl", .data =3D &exynosautov9_of_data }, { .compatible =3D "samsung,exynosautov920-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/sa= msung/pinctrl-samsung.h index dc930d620f55..615048f94524 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -385,6 +385,7 @@ extern const struct samsung_pinctrl_of_match_data exyno= s7_of_data; extern const struct samsung_pinctrl_of_match_data exynos7885_of_data; extern const struct samsung_pinctrl_of_match_data exynos850_of_data; extern const struct samsung_pinctrl_of_match_data exynos8895_of_data; +extern const struct samsung_pinctrl_of_match_data exynos990_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data; extern const struct samsung_pinctrl_of_match_data fsd_of_data; --=20 2.45.2 From nobody Tue Nov 26 21:27:58 2024 Received: from out-02.smtp.spacemail.com (out-02.smtp.spacemail.com [63.250.43.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38DDF1FF044; Tue, 15 Oct 2024 21:05:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026323; 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spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="RMf6wwVk" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSmp40VZqz4wLk; Tue, 15 Oct 2024 21:05:16 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSmnw1BfBz8sWN; Tue, 15 Oct 2024 21:05:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1729026310; bh=prwkzYVAPS8mF4UPbbihuKENaA7AMZ05lgB99oMaIt4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RMf6wwVk41akzy1rRS1O/XCx0j+MeBmaM1QMmlM3lH2lBUWmrfhaTZpCpxLsgA694 OexDU91N8N7xxTNtV/reARbZg0QffTNiQhrqOqDqaGXfPGtzXM9/M46i9qB++KyROk nXCReV8wDwFAJEpNV7o3nOAMUn2/FK27sKiA/1GmSY69H6NiAMLzKJ4voYvrCfWJ8O /ci09AFKVseCL36JY8G0ZniISY5q6ONqpaFQPX6wvvvH4q8EXswfc/1bfbGTDP8WLs nz/tF2H94c/HLwPCjKzsuSXl7GkF5d/6biyxvl2QLy83j9z7U3dsvpmH9IlQ+PqNSW suFuy4uBpZLZA== From: Igor Belwon To: Krzysztof Kozlowski , Sylwester Nawrocki , Alim Akhtar , Linus Walleij , Rob Herring , Conor Dooley , Tomasz Figa Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/5] arm64: dts: exynos: Add Exynos 990 pinctrl nodes Date: Tue, 15 Oct 2024 23:04:49 +0200 Message-ID: <20241015210450.964093-5-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> References: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add pinctrl nodes for the Exynos 990 SoC. Signed-off-by: Igor Belwon --- .../boot/dts/exynos/exynos990-pinctrl.dtsi | 2195 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynos990.dtsi | 57 + 2 files changed, 2252 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi b/arch/arm64= /boot/dts/exynos/exynos990-pinctrl.dtsi new file mode 100644 index 000000000000..a03d36458d76 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi @@ -0,0 +1,2195 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Exynos 990 pin-mux and pin-config device tree source + * + * Copyright (c) 2024, Igor Belwon + */ + +#include +#include "exynos-pinctrl.h" + +&pinctrl_alive { + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa3: gpa3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa4: gpa4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + ; + }; + + gpq0: gpq0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + speedy_bus: speedy-bus-pins { + samsung,pins =3D "gpq0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + speedy1_bus: speedy1-bus-pins { + samsung,pins =3D "gpq0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + /* UART1 is also referred to as UART_BT in downstream. */ + uart1_bus_single: uart1-bus-pins { + samsung,pins =3D "gpq0-3", "gpq0-2", "gpq0-1", "gpq0-0"; + samsung,pin-function =3D ; + samsung,pin-drv =3D ; + samsung,pin-pud =3D ; + }; + + uart1_rxd_pull: uart1-bus-rxd-pins { + samsung,pins =3D "gpq0-0"; + samsung,pin-pud =3D ; + }; + + uart1_bus_rts: uart1-bus-rts-pins { + samsung,pins =3D "gpq0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart1_bus_tx_input: uart1-bus-tx-input-pins { + samsung,pins =3D "gpq0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart1_bus_tx_dat: uart1-bus-tx-dat-pins { + samsung,pins =3D "gpq0-1"; + }; + + uart1_bus_tx_con: uart1-bus-tx-con-pins { + samsung,pins =3D "gpq0-1"; + samsung,pin-function =3D ; + }; + + wlan_host_wake: wlan-host-wake-pins { + samsung,pins =3D "gpa0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_cmgp { + gpm0: gpm0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpm1: gpm1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpm2: gpm2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpm3: gpm3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpm4: gpm4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm5: gpm5-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm6: gpm6-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm7: gpm7-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm8: gpm8-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm9: gpm9-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm10: gpm10-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm11: gpm11-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm12: gpm12-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm13: gpm13-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm14: gpm14-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm15: gpm15-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm16: gpm16-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm17: gpm17-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm18: gpm18-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm19: gpm19-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm20: gpm20-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm21: gpm21-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm22: gpm22-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm23: gpm23-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm24: gpm24-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm25: gpm25-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm26: gpm26-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm27: gpm27-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm28: gpm28-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm29: gpm29-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm30: gpm30-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm31: gpm31-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm32: gpm32-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm33: gpm33-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + hsi2c38_bus: hsi2c38-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c39_bus: hsi2c39-bus-pins { + samsung,pins =3D "gpm2-0", "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c40_bus: hsi2c40-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c41_bus: hsi2c41-bus-pins { + samsung,pins =3D "gpm6-0", "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c42_bus: hsi2c42-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c43_bus: hsi2c43-bus-pins { + samsung,pins =3D "gpm10-0", "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c44_bus: hsi2c44-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c45_bus: hsi2c45-bus-pins { + samsung,pins =3D "gpm14-0", "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi19_bus: spi19-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0", "gpm2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi19_cs: spi19-cs-pins { + samsung,pins =3D "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi19_cs_func: spi19-cs-func-pins { + samsung,pins =3D "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi20_bus: spi20-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0", "gpm6-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi20_cs: spi20-cs-pins { + samsung,pins =3D "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi20_cs_func: spi20-cs-func-pins { + samsung,pins =3D "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi21_bus: spi21-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0", "gpm10-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi21_cs: spi21-cs-pins { + samsung,pins =3D "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi21_cs_func: spi21-cs-func-pins { + samsung,pins =3D "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi22_bus: spi22-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0", "gpm14-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi22_cs: spi22-cs-pins { + samsung,pins =3D "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi22_cs_func: spi22-cs-func-pins { + samsung,pins =3D "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart21_bus_single: uart21-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0", "gpm2-0", "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart21_bus_dual: uart21-bus-dual-pins { + samsung,pins =3D "gpm0-0", "gpm1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart22_bus_single: uart22-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0", "gpm6-0", "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart22_bus_dual: uart22-bus-dual-pins { + samsung,pins =3D "gpm4-0", "gpm5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart23_bus_single: uart23-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0", "gpm10-0", "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart23_bus_dual: uart23-bus-dual-pins { + samsung,pins =3D "gpm8-0", "gpm9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart24_bus_single: uart24-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0", "gpm14-0", "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart24_bus_dual: uart24-bus-dual-pins { + samsung,pins =3D "gpm12-0", "gpm13-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_hsi1 { + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf2: gpf2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + pcie0_clkreq: pcie0-clkreq-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + pcie0_perst: pcie0-perst-pins { + samsung,pins =3D "gpf0-1"; + samsung,pin-function =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + }; + + pcie1_clkreq: pcie1-clkreq-pins { + samsung,pins =3D "gpf0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + pcie1_perst: pcie1-perst-pins { + samsung,pins =3D "gpf0-3"; + samsung,pin-function =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins =3D "gpf2-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins =3D "gpf2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins =3D "gpf1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins =3D "gpf1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins =3D "gpf1-3", "gpf1-4", "gpf1-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_1_5x: sd2-clk-fast-slew-rate-1-5x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_2_5x: sd2-clk-fast-slew-rate-2-5x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk-fas-slew-rate-3x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_pins_as_pdn: sd2-pins-as-pdn-pins { + samsung,pins =3D "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4", "gpf1= -5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_hsi2 { + gpf3: gpf3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + pcie2_clkreq: pcie2-clkreq-pins { + samsung,pins =3D "gpf3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + pcie2_perst: pcie2-perst-pins { + samsung,pins =3D "gpf3-1"; + samsung,pin-function =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + }; +}; + +&pinctrl_peric0 { + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp0: gpp0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp1: gpp1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp2: gpp2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp3: gpp3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp4: gpp4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins =3D "gpp0-0", "gpp0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins =3D "gpp0-2", "gpp0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins =3D "gpp0-4", "gpp0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins =3D "gpp0-6", "gpp0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins =3D "gpp1-0", "gpp1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins =3D "gpp1-2", "gpp1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins =3D "gpp1-4", "gpp1-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins =3D "gpp1-6", "gpp1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins =3D "gpp2-0", "gpp2-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins =3D "gpp2-2", "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins =3D "gpp2-4", "gpp2-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins =3D "gpp2-6", "gpp2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c26_bus: hsi2c26-bus-pins { + samsung,pins =3D "gpp3-0", "gpp3-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c27_bus: hsi2c27-bus-pins { + samsung,pins =3D "gpp3-2", "gpp3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + hsi2c28_bus: hsi2c28-bus-pins { + samsung,pins =3D "gpp3-4", "gpp3-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c29_bus: hsi2c29-bus-pins { + samsung,pins =3D "gpp3-6", "gpp3-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c30_bus: hsi2c30-bus-pins { + samsung,pins =3D "gpp4-0", "gpp4-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c31_bus: hsi2c31-bus-pins { + samsung,pins =3D "gpp4-2", "gpp4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins =3D "gpp0-2", "gpp0-1", "gpp0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins =3D "gpp0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_cs_func: spi0-cs-func-pins { + samsung,pins =3D "gpp0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_bus: spi1-bus-pins { + samsung,pins =3D "gpp0-6", "gpp0-5", "gpp0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins =3D "gpp0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_cs_func: spi1-cs-func-pins { + samsung,pins =3D "gpp0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_bus: spi2-bus-pins { + samsung,pins =3D "gpp1-2", "gpp1-1", "gpp1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins =3D "gpp1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_cs_func: spi2-cs-func-pins { + samsung,pins =3D "gpp1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_bus: spi3-bus-pins { + samsung,pins =3D "gpp1-6", "gpp1-5", "gpp1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins =3D "gpp1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_cs_func: spi3-cs-func-pins { + samsung,pins =3D "gpp1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_bus: spi4-bus-pins { + samsung,pins =3D "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins =3D "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_cs_func: spi4-cs-func-pins { + samsung,pins =3D "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_fp_inactive: spi4-fp-inactive-pins { + samsung,pins =3D "gpp2-3", "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_fp_cs_func_high: spi4-fp-cs-func-high-pins { + samsung,pins =3D "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_bus: spi5-bus-pins { + samsung,pins =3D "gpp2-6", "gpp2-5", "gpp2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins =3D "gpp2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_cs_func: spi5-cs-func-pins { + samsung,pins =3D "gpp2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_bus: spi13-bus-pins { + samsung,pins =3D "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_cs: spi13-cs-pins { + samsung,pins =3D "gpp3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_cs_func: spi13-cs-func-pins { + samsung,pins =3D "gpp3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_bus: spi14-bus-pins { + samsung,pins =3D "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_cs: spi14-cs-pins { + samsung,pins =3D "gpp3-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_cs_func: spi14-cs-func-pins { + samsung,pins =3D "gpp3-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_bus: spi15-bus-pins { + samsung,pins =3D "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_cs: spi15-cs-pins { + samsung,pins =3D "gpp4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_cs_func: spi15-cs-func-pins { + samsung,pins =3D "gpp4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart0_bus: uart0-bus-pins { + samsung,pins =3D "gpp4-6", "gpp4-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart2_bus_single: uart2-bus-pins { + samsung,pins =3D "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins =3D "gpp0-0", "gpp0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus_single: uart3-bus-pins { + samsung,pins =3D "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins =3D "gpp0-4", "gpp0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus_single: uart4-bus-pins { + samsung,pins =3D "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins =3D "gpp1-0", "gpp1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus_single: uart5-bus-pins { + samsung,pins =3D "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins =3D "gpp1-4", "gpp1-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart6_bus_single: uart6-bus-pins { + samsung,pins =3D "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins =3D "gpp2-0", "gpp2-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart7_bus_single: uart7-bus-pins { + samsung,pins =3D "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins =3D "gpp2-4", "gpp2-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart15_bus_single: uart15-bus-pins { + samsung,pins =3D "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart15_bus_dual: uart15-bus-dual-pins { + samsung,pins =3D "gpp3-0", "gpp3-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart16_bus_single: uart16-bus-pins { + samsung,pins =3D "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart16_bus_dual: uart16-bus-dual-pins { + samsung,pins =3D "gpp3-4", "gpp3-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart17_bus_single: uart17-bus-pins { + samsung,pins =3D "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart17_bus_dual: uart17-bus-dual-pins { + samsung,pins =3D "gpp4-0", "gpp4-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_peric1 { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg1: gpg1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp5: gpp5-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp6: gpp6-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp7: gpp7-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp8: gpp8-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp9: gpp9-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + aud_i2s0_bus: aud-i2s0-bus-pins { + samsung,pins =3D "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s0_idle: aud-i2s0-idle-pins { + samsung,pins =3D "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s1_bus: aud-i2s1-bus-pins { + samsung,pins =3D "gpb0-4", "gpb0-5", "gpb0-6", "gpb0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s1_idle: aud-i2s1-idle-pins { + samsung,pins =3D "gpb0-4", "gpb0-5", "gpb0-6", "gpb0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s2_bus: aud-i2s2-bus-pins { + samsung,pins =3D "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s2_idle: aud-i2s2-idle-pins { + samsung,pins =3D "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s3_bus: aud-i2s3-bus-pins { + samsung,pins =3D "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s3_idle: aud-i2s3-idle-pins { + samsung,pins =3D "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s4_bus: aud-i2s4-bus-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s4_pci: aud-i2s4-pci-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s4_idle: aud-i2s4-idle-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s5_bus: aud-i2s5-bus-pins { + samsung,pins =3D "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s5_idle: aud-i2s5-idle-pins { + samsung,pins =3D "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_dsd_bus: aud-dsd-bus-pins { + samsung,pins =3D "gpb2-4", "gpb2-5", "gpb2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_dsd_idle: aud-dsd-idle-pins { + samsung,pins =3D "gpb2-4", "gpb2-5", "gpb2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + cfg_wlanen: cfg-wlanen-pins { + samsung,pins =3D "gpb0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + cnss_wlan_en_active: cnss-wlan-en-active-pins { + samsung,pins =3D "gpb0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + cnss_wlan_en_sleep: cnss-wlan-en-sleep-pins { + samsung,pins =3D "gpb0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + decon_f_te_on: decon-f-te-on-pins { + samsung,pins =3D "gpc0-4"; + samsung,pin-function =3D <0xf>; + }; + + decon_f_te_off: decon-f-te-off-pins { + samsung,pins =3D "gpc0-4"; + samsung,pin-function =3D ; + }; + + decon_s_te_on: decon-s-te-on-pins { + samsung,pins =3D "gpc0-5"; + samsung,pin-function =3D <0xf>; + }; + + decon_s_te_off: decon-s-te-off-pins { + samsung,pins =3D "gpc0-5"; + samsung,pin-function =3D ; + }; + + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins =3D "gpp5-0", "gpp5-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins =3D "gpp5-2", "gpp5-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins =3D "gpp5-4", "gpp5-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins =3D "gpp5-6", "gpp5-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins =3D "gpp6-0", "gpp6-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins =3D "gpp6-2", "gpp6-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins =3D "gpp6-4", "gpp6-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins =3D "gpp6-6", "gpp6-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins =3D "gpp7-0", "gpp7-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins =3D "gpp7-2", "gpp7-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins =3D "gpp7-4", "gpp7-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins =3D "gpp7-6", "gpp7-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c24_bus: hsi2c24-bus-pins { + samsung,pins =3D "gpp8-0", "gpp8-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c25_bus: hsi2c25-bus-pins { + samsung,pins =3D "gpp8-2", "gpp8-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c32_bus: hsi2c32-bus-pins { + samsung,pins =3D "gpp8-4", "gpp8-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c33_bus: hsi2c33-bus-pins { + samsung,pins =3D "gpp8-6", "gpp8-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c34_bus: hsi2c34-bus-pins { + samsung,pins =3D "gpp9-0", "gpp9-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c35_bus: hsi2c35-bus-pins { + samsung,pins =3D "gpp9-2", "gpp9-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c36_bus: hsi2c36-bus-pins { + samsung,pins =3D "gpp9-4", "gpp9-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c37_bus: hsi2c37-bus-pins { + samsung,pins =3D "gpp9-6", "gpp9-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk0_out: sensor-mclk0-out-pins { + samsung,pins =3D "gpc0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk1_out: sensor-mclk1-out-pins { + samsung,pins =3D "gpg1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk2_out: sensor-mclk2-out-pins { + samsung,pins =3D "gpc0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk3_out: sensor-mclk3-out-pins { + samsung,pins =3D "gpc0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk4_out: sensor-mclk4-out-pins { + samsung,pins =3D "gpc0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk5_out: sensor-mclk5-out-pins { + samsung,pins =3D "gpg1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk0_fn: sensor-mclk0-fn-pins { + samsung,pins =3D "gpc0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk1_fn: sensor-mclk1-fn-pins { + samsung,pins =3D "gpg1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk2_fn: sensor-mclk2-fn-pins { + samsung,pins =3D "gpc0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk3_fn: sensor-mclk3-fn-pins { + samsung,pins =3D "gpc0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk4_fn: sensor-mclk4-fn-pins { + samsung,pins =3D "gpc0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk5_fn: sensor-mclk5-fn-pins { + samsung,pins =3D "gpg1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_bus: spi6-bus-pins { + samsung,pins =3D "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins =3D "gpp5-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_cs_func: spi6-cs-func-pins { + samsung,pins =3D "gpp5-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_bus: spi7-bus-pins { + samsung,pins =3D "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins =3D "gpp5-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_cs_func: spi7-cs-func-pins { + samsung,pins =3D "gpp5-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_bus: spi8-bus-pins { + samsung,pins =3D "gpp6-2", "gpp6-1", "gpp6-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins =3D "gpp6-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_cs_func: spi8-cs-func-pins { + samsung,pins =3D "gpp6-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_bus: spi9-bus-pins { + samsung,pins =3D "gpp6-6", "gpp6-5", "gpp6-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins =3D "gpp6-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_cs_func: spi9-cs-func-pins { + samsung,pins =3D "gpp6-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_bus: spi10-bus-pins { + samsung,pins =3D "gpp7-2", "gpp7-1", "gpp7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins =3D "gpp7-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_cs_func: spi10-cs-func-pins { + samsung,pins =3D "gpp7-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_bus: spi11-bus-pins { + samsung,pins =3D "gpp7-6", "gpp7-5", "gpp7-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins =3D "gpp7-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_cs_func: spi11-cs-func-pins { + samsung,pins =3D "gpp7-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_bus: spi12-bus-pins { + samsung,pins =3D "gpp8-2", "gpp8-1", "gpp8-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_cs: spi12-cs-pins { + samsung,pins =3D "gpp8-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_cs_func: spi12-cs-func-pins { + samsung,pins =3D "gpp8-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi16_bus: spi16-bus-pins { + samsung,pins =3D "gpp8-6", "gpp8-5", "gpp8-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + spi16_cs: spi16-cs-pins { + samsung,pins =3D "gpp8-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi16_cs_func: spi16-cs-func-pins { + samsung,pins =3D "gpp8-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + spi17_bus: spi17-bus-pins { + samsung,pins =3D "gpp9-2", "gpp9-1", "gpp9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi17_cs: spi17-cs-pins { + samsung,pins =3D "gpp9-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi17_cs_func: spi17-cs-func-pins { + samsung,pins =3D "gpp9-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi18_bus: spi18-bus-pins { + samsung,pins =3D "gpp9-6", "gpp9-5", "gpp9-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi18_cs: spi18-cs-pins { + samsung,pins =3D "gpp9-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi18_cs_func: spi18-cs-func-pins { + samsung,pins =3D "gpp9-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart8_bus_single: uart8-bus-pins { + samsung,pins =3D "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins =3D "gpp5-0", "gpp5-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart9_bus_single: uart9-bus-pins { + samsung,pins =3D "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins =3D "gpp5-4", "gpp5-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart10_bus_single: uart10-bus-pins { + samsung,pins =3D "gpp6-3", "gpp6-2", "gpp6-1", "gpp6-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins =3D "gpp6-0", "gpp6-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart11_bus_single: uart11-bus-pins { + samsung,pins =3D "gpp6-7", "gpp6-6", "gpp6-5", "gpp6-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins =3D "gpp6-4", "gpp6-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart12_bus_single: uart12-bus-pins { + samsung,pins =3D "gpp7-3", "gpp7-2", "gpp7-1", "gpp7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart12_bus_dual: uart12-bus-dual-pins { + samsung,pins =3D "gpp7-0", "gpp7-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart13_bus_single: uart13-bus-pins { + samsung,pins =3D "gpp7-7", "gpp7-6", "gpp7-5", "gpp7-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart13_bus_dual: uart13-bus-dual-pins { + samsung,pins =3D "gpp7-4", "gpp7-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart14_bus_single: uart14-bus-pins { + samsung,pins =3D "gpp8-3", "gpp8-2", "gpp8-1", "gpp8-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart14_bus_dual: uart14-bus-dual-pins { + samsung,pins =3D "gpp8-0", "gpp8-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart18_bus_single: uart18-bus-pins { + samsung,pins =3D "gpp8-7", "gpp8-6", "gpp8-5", "gpp8-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart18_bus_dual: uart18-bus-dual-pins { + samsung,pins =3D "gpp8-4", "gpp8-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart19_bus_single: uart19-bus-pins { + samsung,pins =3D "gpp9-3", "gpp9-2", "gpp9-1", "gpp9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart19_bus_dual: uart19-bus-dual-pins { + samsung,pins =3D "gpp9-0", "gpp9-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart20_bus_single: uart20-bus-pins { + samsung,pins =3D "gpp9-7", "gpp9-6", "gpp9-5", "gpp9-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart20_bus_dual: uart20-bus-dual-pins { + samsung,pins =3D "gpp9-4", "gpp9-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_vts { + gpv0: gpv0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + amic_pdm: amic-pdm-pins { + samsung,pins =3D "gpv0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk: dmic-bus-clk-pins { + samsung,pins =3D "gpv0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk_idle: dmic-bus-clk-idle-pins { + samsung,pins =3D "gpv0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk1: dmic-bus-clk1-pins { + samsung,pins =3D "gpv0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk1_idle: dmic-bus-clk1-idle-pins { + samsung,pins =3D "gpv0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk2: dmic-bus-clk2-pins { + samsung,pins =3D "gpv0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk2_idle: dmic-bus-clk2-idle-pins { + samsung,pins =3D "gpv0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm: dmic-pdm-pins { + samsung,pins =3D "gpv0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm_idle: dmic-pdm-idle-pins { + samsung,pins =3D "gpv0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm1_bus: dmic-pdm1-bus-pins { + samsung,pins =3D "gpv0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm1_idle: dmic-pdm1-idle-pins { + samsung,pins =3D "gpv0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm2_bus: dmic-pdm2-bus-pins { + samsung,pins =3D "gpv0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm2_idle: dmic-pdm2-idle-pins { + samsung,pins =3D "gpv0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dt= s/exynos/exynos990.dtsi index 16fda5fe8163..c1986f00e443 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -14,6 +14,16 @@ / { =20 interrupt-parent =3D <&gic>; =20 + aliases { + pinctrl0 =3D &pinctrl_alive; + pinctrl1 =3D &pinctrl_cmgp; + pinctrl2 =3D &pinctrl_hsi1; + pinctrl3 =3D &pinctrl_hsi2; + pinctrl4 =3D &pinctrl_peric0; + pinctrl5 =3D &pinctrl_peric1; + pinctrl6 =3D &pinctrl_vts; + }; + arm-a55-pmu { compatible =3D "arm,cortex-a55-pmu"; interrupts =3D , @@ -176,6 +186,51 @@ gic: interrupt-controller@10101000 { #address-cells =3D <0>; #size-cells =3D <1>; }; + + pinctrl_peric0: pinctrl@10430000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x10430000 0x1000>; + interrupts =3D ; + }; + + pinctrl_peric1: pinctrl@10730000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x10730000 0x1000>; + interrupts =3D ; + }; + + pinctrl_hsi1: pinctrl@13040000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x13040000 0x1000>; + interrupts =3D ; + }; + + pinctrl_hsi2: pinctrl@13c30000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x13c30000 0x1000>; + interrupts =3D ; + }; + + pinctrl_vts: pinctrl@15580000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x15580000 0x1000>; + }; + + pinctrl_alive: pinctrl@15850000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x15850000 0x1000>; + + wakeup-interrupt-controller { + compatible =3D "samsung,exynos990-wakeup-eint", + "samsung,exynos850-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_cmgp: pinctrl@15c30000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x15c30000 0x1000>; + }; }; =20 timer { @@ -192,3 +247,5 @@ timer { clock-frequency =3D <26000000>; }; }; + +#include "exynos990-pinctrl.dtsi" --=20 2.45.2 From nobody Tue Nov 26 21:27:58 2024 Received: from out-02.smtp.spacemail.com (out-02.smtp.spacemail.com [63.250.43.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52BD61FF04C; Tue, 15 Oct 2024 21:05:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026321; cv=none; b=R7BPitCDpIjCnJhEpA5u4vH1wnMMhRznC0tH4+d1IFR6iCmG1cnDCzBT/PWjUYB7jD6T0nqKBm/Cf7lF1APwSDwgxl2xU37fQyplu/PwkctpXFYhq7M4PEephVCinCbKQM7VvT7fTbjN6TEBvz22il0FDssFTIBurQWHOgmx1+w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729026321; c=relaxed/simple; bh=YscXqSr7g4C+sT65nIZWuK+o+u4BsXRQprc7EXuU42M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ki7HLR1a74EjKVV3hqlH5Oj8JauGPW0WkMKl3IMTOqw3kKS2jPy4ad9+AY/v/AcBFGk8gvfy0hLg4azxcU/YotQg9rojXrFGC+odU47yD9/iwLXolrhd7SNJFVMDJyHtDq7ByD8M9gX5ecGODKvdVKoR+10aegxkQblgyJMN1mk= ARC-Authentication-Results: i=1; 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Tue, 15 Oct 2024 21:05:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1729026313; bh=YscXqSr7g4C+sT65nIZWuK+o+u4BsXRQprc7EXuU42M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ezo3bc8ym01UpzdOoDEQyfJ//SsxyF8EBGooaGqj0eT3dipKXE2Dt8QvjpRsKqGsS e8JfnwdR/QjALgPpqjlQd2do5N7QRsUjtEe6GsTC7uMWM/JPFiBdy+jWcGEorxeTqe cpNIxOi3ULHcXOtqTRlm46DPWur8+KnEpGTMk/wPKdH3KqwV8vyvwZOTzhUxrTygTG g+Uv8lY3fFB8LjQgWGqv4EMRZC5SVCtU5eaQBavWVbByaTgHfYsd6TY4ARSOfrZUf3 GcSk12ygxNjwgFTz/jJbw2sD6WtBA4jeRXdZ9KH97Y0KI4mMbwz3Hycb3PENwPFbPT fVUPQOuJtMnrQ== From: Igor Belwon To: Krzysztof Kozlowski , Sylwester Nawrocki , Alim Akhtar , Linus Walleij , Rob Herring , Conor Dooley , Tomasz Figa Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5] arm64: dts: exynos: Add button support for c1s Date: Tue, 15 Oct 2024 23:04:50 +0200 Message-ID: <20241015210450.964093-6-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> References: <20241015210450.964093-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add button (gpio-keys) support for c1s (SM-N981B). Added are all hardware buttons (vol-, vol+ and power). Signed-off-by: Igor Belwon --- arch/arm64/boot/dts/exynos/exynos990-c1s.dts | 49 ++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts b/arch/arm64/boot= /dts/exynos/exynos990-c1s.dts index e57339357dc6..36a6f1377e92 100644 --- a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts +++ b/arch/arm64/boot/dts/exynos/exynos990-c1s.dts @@ -59,8 +59,57 @@ abox_reserved: audio@f7fb0000 { no-map; }; }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&key_power &key_voldown &key_volup>; + pinctrl-names =3D "default"; + + power-key { + label =3D "Power"; + linux,code =3D ; + gpios =3D <&gpa2 4 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + voldown-key { + label =3D "Volume Down"; + linux,code =3D ; + gpios =3D <&gpa0 4 GPIO_ACTIVE_LOW>; + }; + + volup-key { + label =3D "Volume Up"; + linux,code =3D ; + gpios =3D <&gpa0 3 GPIO_ACTIVE_LOW>; + }; + }; }; =20 &oscclk { clock-frequency =3D <26000000>; }; + +&pinctrl_alive { + key_power: key-power-pins { + samsung,pins =3D "gpa2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + key_voldown: key-voldown-pins { + samsung,pins =3D "gpa0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + key_volup: key-volup-pins { + samsung,pins =3D "gpa0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; --=20 2.45.2