From nobody Sat Feb 7 08:27:28 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 419D81F9EB6; Tue, 15 Oct 2024 14:55:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729004125; cv=none; b=cnblg3VLD9CUekhT1WE4jE2MZuKpQakkieojRjdE0jerg1fqO6MwV0VzrfEPK5FV9xe76Ys+vxBl8DGlJ2MVcQHQ4ykZe9igAZn7ZV4YVmzRYmqrGRJU9S6my7z1cV/oggxT/Uj9Y5CDFvVduy8awrJ3Ij3aAJ/FWJAiPfklbio= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729004125; c=relaxed/simple; bh=xP1quQVTfqWZfVS34xQWuGTXpXHRrBU1xEG+XB6ACGk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=J+OxH0X0pO+lpp8M+4HvstzVoCjxXg8tnJ5zBUv3lk1D+XG5eG2NNWNsDFs8OpI6aUARo/2Bo/UodjZ8ycarNmDZsLIiylbtXm2cDOivfTaI5tVa5ul0AJ1fE1COuU3EmMLK54P5+7rnLYjWSiUPp0dNmBhojvSbJq1qcghzLQk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=O6dfp6Ex; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="O6dfp6Ex" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729004124; x=1760540124; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xP1quQVTfqWZfVS34xQWuGTXpXHRrBU1xEG+XB6ACGk=; b=O6dfp6Exc7XH4fGuec2M9Yk2X3ravbRNrZIlgcyBluTYmIjyu6ZTVcZQ Ma/+qvv3tc75k3ai5Gt8CX+nolfeFG9M91LX61pxe1ATrhpSUEHDb6H3r 3WxSUp2SNL4GhuwHAdU32XA4zUnPrNGBDFXsyRZ5O2rIExfkuPeqEZLYP h/d3fNAgW+aVrq5C0UYBLWOxemwaVOkmlplA3+9S7qGt2HwjMDe7BeOdD WliqpeT/tm5MtiZW30Chl0kvJI7Fvw7X+rmcyCnBAxcVx3AYTfZm1U7qM /i3L3fsQDv8y1N/x8CRZgO+iQMII3DCMjqbrxetX5Hf+VXpl77XCMPbj9 w==; X-CSE-ConnectionGUID: w+wMdz+KRvad1N/tZZF7dg== X-CSE-MsgGUID: G09jS29DR/ufNzPm8tKqtg== X-IronPort-AV: E=McAfee;i="6700,10204,11225"; a="31277701" X-IronPort-AV: E=Sophos;i="6.11,205,1725346800"; d="scan'208";a="31277701" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2024 07:55:24 -0700 X-CSE-ConnectionGUID: aDDjU2IBRiibY30jw8YqIA== X-CSE-MsgGUID: XhsdSnG/T4C82rj54RHsLQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="82723172" Received: from newjersey.igk.intel.com ([10.102.20.203]) by orviesa003.jf.intel.com with ESMTP; 15 Oct 2024 07:55:20 -0700 From: Alexander Lobakin To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Alexander Lobakin , =?UTF-8?q?Toke=20H=C3=B8iland-J=C3=B8rgensen?= , Alexei Starovoitov , Daniel Borkmann , John Fastabend , Andrii Nakryiko , Stanislav Fomichev , Magnus Karlsson , nex.sw.ncis.osdt.itp.upstreaming@intel.com, bpf@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 17/18] libeth: support native XDP and register memory model Date: Tue, 15 Oct 2024 16:53:49 +0200 Message-ID: <20241015145350.4077765-18-aleksander.lobakin@intel.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241015145350.4077765-1-aleksander.lobakin@intel.com> References: <20241015145350.4077765-1-aleksander.lobakin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Expand libeth's Page Pool functionality by adding native XDP support. This means picking the appropriate headroom and DMA direction. Also, register all the created &page_pools as XDP memory models. A driver then can call xdp_rxq_info_attach_page_pool() when registering its RxQ info. Signed-off-by: Alexander Lobakin --- include/net/libeth/rx.h | 6 +++++- drivers/net/ethernet/intel/libeth/rx.c | 20 +++++++++++++++----- 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/include/net/libeth/rx.h b/include/net/libeth/rx.h index 43574bd6612f..148be5cd822e 100644 --- a/include/net/libeth/rx.h +++ b/include/net/libeth/rx.h @@ -13,8 +13,10 @@ =20 /* Space reserved in front of each frame */ #define LIBETH_SKB_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN) +#define LIBETH_XDP_HEADROOM (ALIGN(XDP_PACKET_HEADROOM, NET_SKB_PAD) + \ + NET_IP_ALIGN) /* Maximum headroom for worst-case calculations */ -#define LIBETH_MAX_HEADROOM LIBETH_SKB_HEADROOM +#define LIBETH_MAX_HEADROOM LIBETH_XDP_HEADROOM /* Link layer / L2 overhead: Ethernet, 2 VLAN tags (C + S), FCS */ #define LIBETH_RX_LL_LEN (ETH_HLEN + 2 * VLAN_HLEN + ETH_FCS_LEN) /* Maximum supported L2-L4 header length */ @@ -66,6 +68,7 @@ enum libeth_fqe_type { * @count: number of descriptors/buffers the queue has * @type: type of the buffers this queue has * @hsplit: flag whether header split is enabled + * @xdp: flag indicating whether XDP is enabled * @buf_len: HW-writeable length per each buffer * @nid: ID of the closest NUMA node with memory */ @@ -81,6 +84,7 @@ struct libeth_fq { /* Cold fields */ enum libeth_fqe_type type:2; bool hsplit:1; + bool xdp:1; =20 u32 buf_len; int nid; diff --git a/drivers/net/ethernet/intel/libeth/rx.c b/drivers/net/ethernet/= intel/libeth/rx.c index f20926669318..616426a2e363 100644 --- a/drivers/net/ethernet/intel/libeth/rx.c +++ b/drivers/net/ethernet/intel/libeth/rx.c @@ -68,7 +68,7 @@ static u32 libeth_rx_hw_len_truesize(const struct page_po= ol_params *pp, static bool libeth_rx_page_pool_params(struct libeth_fq *fq, struct page_pool_params *pp) { - pp->offset =3D LIBETH_SKB_HEADROOM; + pp->offset =3D fq->xdp ? LIBETH_XDP_HEADROOM : LIBETH_SKB_HEADROOM; /* HW-writeable / syncable length per one page */ pp->max_len =3D LIBETH_RX_PAGE_LEN(pp->offset); =20 @@ -155,11 +155,12 @@ int libeth_rx_fq_create(struct libeth_fq *fq, struct = napi_struct *napi) .dev =3D napi->dev->dev.parent, .netdev =3D napi->dev, .napi =3D napi, - .dma_dir =3D DMA_FROM_DEVICE, }; struct libeth_fqe *fqes; struct page_pool *pool; - bool ret; + int ret; + + pp.dma_dir =3D fq->xdp ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE; =20 if (!fq->hsplit) ret =3D libeth_rx_page_pool_params(fq, &pp); @@ -173,18 +174,26 @@ int libeth_rx_fq_create(struct libeth_fq *fq, struct = napi_struct *napi) return PTR_ERR(pool); =20 fqes =3D kvcalloc_node(fq->count, sizeof(*fqes), GFP_KERNEL, fq->nid); - if (!fqes) + if (!fqes) { + ret =3D -ENOMEM; goto err_buf; + } + + ret =3D xdp_reg_page_pool(pool); + if (ret) + goto err_mem; =20 fq->fqes =3D fqes; fq->pp =3D pool; =20 return 0; =20 +err_mem: + kvfree(fqes); err_buf: page_pool_destroy(pool); =20 - return -ENOMEM; + return ret; } EXPORT_SYMBOL_NS_GPL(libeth_rx_fq_create, LIBETH); =20 @@ -194,6 +203,7 @@ EXPORT_SYMBOL_NS_GPL(libeth_rx_fq_create, LIBETH); */ void libeth_rx_fq_destroy(struct libeth_fq *fq) { + xdp_unreg_page_pool(fq->pp); kvfree(fq->fqes); page_pool_destroy(fq->pp); } --=20 2.46.2