From nobody Wed Nov 27 00:41:14 2024 Received: from out-03.smtp.spacemail.com (out-03.smtp.spacemail.com [63.250.43.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0EE31189F30; Tue, 15 Oct 2024 06:35:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728974102; cv=none; b=torHOYD2VIqLpezMvzbCmKahTWTZSNWk90F4ATAi58J/8n54+m2uE57L8UCGGRnuVXXsqWUyocb5xA9bclHvz/EOLubOrhXzvo16xEJ6pqK5QdYKCqBiaRES30VweEOUR9SRU0KxcfxOozkg9KQYttW38ueQGz4haXFlJQbzuzk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728974102; c=relaxed/simple; bh=gaLEZ2d4+Gi0QtC+bneHdGHQJ2El3KoJZBMz6bRlRjg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tdcG4YiJHlA7Kpdee8ocOgxITtG06iryeRmaNyo48rTjl4pxC3udkxywnstudhlCZuFR+HyIU48FYmIiIf9WR0vgE8WcXU2gqZhjIKqGfWkcbFdTyE62dNumC+iN06xIHGNXCX58d4/cZhMzb18vS5QkbWLakV7GYfRKeiIdlbA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=DcR9lsnH; arc=none smtp.client-ip=63.250.43.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="DcR9lsnH" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSPLQ214xzGpTM; Tue, 15 Oct 2024 06:28:30 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSPLG2Rygz2x9F; Tue, 15 Oct 2024 06:28:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1728973705; bh=gaLEZ2d4+Gi0QtC+bneHdGHQJ2El3KoJZBMz6bRlRjg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DcR9lsnH8W7SyiEYfbf3yNQDDoPVfFilFIzFqwdvVbQTPdkr2TBHVnhZYxzuXonSy wbZtiDT3ouVmxGnXzM0/emw7SQWtcrMzedL5ra9T2qtHIsrbeN3woP3Yf2NOaCJq+1 O5EhxwVPmn4vMazsZIIjo8CYCRNlLzHiAoreIGBffDUhgOvZaRvo5kfQ3AWh4Zn60w W1BriBxr4tjrMKQ6uGFoJm6TxByQMpW3BuaCpOLwQ0g2NRDqVyNF8i5NxqRs6ORCX7 uwnjskHFapW5/c2NFGTuUherMgBb4bd8//ziAHC11uskubcd8zPcvGUFgxYTKMr2Sn 45Rkbed5O5M8A== From: Igor Belwon To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, david@mainlining.org Subject: [PATCH v1 1/7] dt-bindings: arm: cpus: Add Samsung Mongoose M5 Date: Tue, 15 Oct 2024 08:27:40 +0200 Message-ID: <20241015062746.713245-2-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> References: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a compatible for the Samsung Mongoose M5 cores, found in the Exynos 990. Signed-off-by: Igor Belwon Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentatio= n/devicetree/bindings/arm/cpus.yaml index e41a8aec6066..c54d20dd9d7e 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -207,6 +207,7 @@ properties: - qcom,oryon - qcom,scorpion - samsung,mongoose-m2 + - samsung,mongoose-m5 =20 enable-method: $ref: /schemas/types.yaml#/definitions/string --=20 2.45.2 From nobody Wed Nov 27 00:41:14 2024 Received: from out-02.smtp.spacemail.com (out-02.smtp.spacemail.com [63.250.43.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD667189BBF; Tue, 15 Oct 2024 06:35:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728974102; cv=none; b=HDnyZZXV5w7hc+9oojLzr8gnAfER4Y2HhH7rGVmP6o3YiGCMXyrks6ZQJRSrKhuQWjdJDASX9Mx96wUKgcsNNF5F37Ep3VMqZyyD5WKSw0h+NtIJQNghQ6ujB5EGDd5VeqQ5xmb9BRcRrHp//kj76pxdiaYepNsEn6EpUl4yyvI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728974102; c=relaxed/simple; bh=N1tK/Gf1hqrbHvTeOFOJ9O1O9vrudZVyOkpSwb3tzr4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=c9B2+/M13irlvjx1x04GYcw/GxAUeK/RhQPaHu05SOXCWgj8mMhq6YKpHJBlxlxSdjBDBLuRcdYDlGMmP57lvEilC3mSDenedKZp/U5kpd2c5YQvdl2Cc0M/T2zzJ9RqMrL/fQzeCvneTeCa3RsDzmD97DyFYLUrmdIy3KapMoE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=L0QFYw6m; arc=none smtp.client-ip=63.250.43.87 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="L0QFYw6m" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSPLT2mNJz4wYS; Tue, 15 Oct 2024 06:28:33 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSPLK3dS9z2x99; Tue, 15 Oct 2024 06:28:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1728973708; bh=N1tK/Gf1hqrbHvTeOFOJ9O1O9vrudZVyOkpSwb3tzr4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=L0QFYw6m5XAau/bTCVXv/UpOZcJkK5AmADVGVM8hyUA4wCZtaJGd25rxru9eLgHDJ yAUYOlpNWFV9AhsHZQbD2GItIE4wwan4lqWAtgw6TYdTdx3ceGYbu4pgQ47u8scHga 7A8E1P/VO+vIQLE7mWIZM593bx4BJ5c/DwXDin1wNJmqhi239y8YDHnv7G+ohfv7SK ml88pFZ1gNLBQSLdCcCbhaXkEPZNKQyeU0o2o3uCqy7ZO32uizXI/LjUjYvEUKs7Cq srHznZIIhr0qtjQ9R4M2fW33OlyFA+gVOyuiJj3E0DmFzVlRuFahiuBf83UUUkO09/ W8wthRMbfySZA== From: Igor Belwon To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, david@mainlining.org Subject: [PATCH v1 2/7] dt-bindings: hwinfo: exynos-chipid: Add compatible for Exynos 990 chipid Date: Tue, 15 Oct 2024 08:27:41 +0200 Message-ID: <20241015062746.713245-3-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> References: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a compatible for the exynos990-chipid node, used by Exynos 990 platforms. Signed-off-by: Igor Belwon --- .../devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid= .yaml b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml index c50ee587dc1e..47a8d98346eb 100644 --- a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml +++ b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml @@ -24,6 +24,7 @@ properties: - enum: - samsung,exynos7885-chipid - samsung,exynos8895-chipid + - samsung,exynos990-chipid - samsung,exynosautov9-chipid - samsung,exynosautov920-chipid - const: samsung,exynos850-chipid --=20 2.45.2 From nobody Wed Nov 27 00:41:14 2024 Received: from out-03.smtp.spacemail.com (out-03.smtp.spacemail.com [63.250.43.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B9D6189B9B; Tue, 15 Oct 2024 06:28:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973719; cv=none; b=njD10oJbqz60NW0ClUcSZS0PbhS0Gzinsx9GvL1xlMZD6sIQ9xhjhLG18mysn0zuyfzBwb/wbZ3WYf+5BllE4aNqwrnq+IJ7YPOrPorM7qWsB2Z8QXT7rvsunlfc6tK1QJwJjmdCI/P6uB8YY9WuCeqMq2brbofoQ9PMcU8wUHc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973719; c=relaxed/simple; bh=i9CRyCmH1jmIrAYXtqp2Ol8Cit/CqxernI4YANbTw1Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kmJ/OWUqEQVGygKBKhutNSEhJKwJ3fpBPh/ictPrwsDSn6rWb02f/l4q7rKdGfZLBtZw2W9zxMiIk0wGq67pmfysV1v/szQ7T5foo9K+rOv4iUYcTrOrPYNKJtrl+VlPf16N9wvQj5U9E9BEaT+YQaqmZkxflT2uk0xXaK9sCPY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=aI+RI5Jj; arc=none smtp.client-ip=63.250.43.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="aI+RI5Jj" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSPLX3c7mzGpTN; Tue, 15 Oct 2024 06:28:36 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSPLN4dLYz2x9B; Tue, 15 Oct 2024 06:28:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1728973711; bh=i9CRyCmH1jmIrAYXtqp2Ol8Cit/CqxernI4YANbTw1Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aI+RI5Jj0ZuHMJrqNNHIK2d6BZ8Y9/nJP3Pzy03E32BGvPe2RKUXHle713jweG3Wx 1botSQGLoy599cFXGE659COzlEQ8QMtCbffRAFB2lMRvVSCZa4AzcIHOCZrf57RVuw qsRD+/cVpRH5eT+80dBxbp6a+hlBNwIdefXYnBObvu5PmDpc5oTVaHSi4LhiJU+Y47 9VaN7igxDX+FL4CluBvvs/MBvZP058A6oaoFPb5EzUfCR0mT9crcPJDB+B8ovbG0+Z DYmjknS2CnBdDWFR6wuyGVEZp2OXz9P36ONs6LfvsyzRqjaL5D7x1HZ/mfh9N7BxaF yGcazTKA0PeSw== From: Igor Belwon To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, david@mainlining.org Subject: [PATCH v1 3/7] dt-bindings: arm: samsung: samsung-boards: Add bindings for Exynos 990 boards. Date: Tue, 15 Oct 2024 08:27:42 +0200 Message-ID: <20241015062746.713245-4-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> References: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add devicetree bindings for Exynos 990 boards. Currently the Galaxy Note20 5G (c1s). Signed-off-by: Igor Belwon --- .../devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.y= aml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 49884a7ab5c6..d25a17e69725 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -230,6 +230,12 @@ properties: - samsung,dreamlte # Samsung Galaxy S8 (SM-G9= 50F) - const: samsung,exynos8895 =20 + - description: Exynos990 based boards + items: + - enum: + - samsung,c1s # Samsung Galaxy Note20 5G= (SM-N981B) + - const: samsung,exynos990 + - description: Exynos Auto v9 based boards items: - enum: --=20 2.45.2 From nobody Wed Nov 27 00:41:14 2024 Received: from out-03.smtp.spacemail.com (out-03.smtp.spacemail.com [63.250.43.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D95E18A6A1; Tue, 15 Oct 2024 06:28:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973722; cv=none; b=HtQUrE4oklwwMTaNiOCnzIeB5Q/zS+GT1tRVRYK69zRl74gymfFktufQ6XbXgUlu5BkX4LDmJmL/1BgJCfW1bvnbpWXJhi+gCYJz3FVbIwAmFkaE0qWTWmmP4B6zJImQ9lpdfaEpnsTUIS4sM8QdEAW6c4vlab4WbJqFankpEVE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973722; c=relaxed/simple; bh=gUlS1i8qx/2ojHqYIjPj+RLbxOrGmJfLGOal1pufpCw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mGrPdkyXgbpHqUcd1Cie/z8YUE3hSllrN1ik3rd33TesxaWquKgm3kyiJotFPCpeWIaWaRJg5EiWRmZ2K4DwZnEtJdKwL+HlpuVsjwC9Z9Tf70dPs3DDa/c2PpISznNdD4BR/SOoCMb9CFgimSstGG7fm6NXcKbLEhqSauduqxI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=h7/ozqdj; arc=none smtp.client-ip=63.250.43.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="h7/ozqdj" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSPLb4p6tzGpTQ; Tue, 15 Oct 2024 06:28:39 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSPLR5Wl5z2x9F; Tue, 15 Oct 2024 06:28:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1728973714; bh=gUlS1i8qx/2ojHqYIjPj+RLbxOrGmJfLGOal1pufpCw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h7/ozqdjvIst0wenYXXPEQCqLVYXWnd8loL47VLt/5O65olsZGl4pJgib6zGium3+ UpyuN4Uz6TjI61wkdr29JdVm7fr5l6H6I5K16A7Hox8bl9zXixji8ngKoH6RjBIAZI CkxELZov8QMuSzjFzV+aLphIjj9w1YeJggTjF10knzrTb7WfIhBGvTSU/mMS5jhv84 bLnQ/KWhsN6IBsiJh7XIOr+W+lmaeoi3BLkRgSbL7uqow1Cfl/llRQYMcfx3vaXXhT qh287O82vFZrSJ6tnRa8AkYbzzqVLmF9mmpQuJ1J1UYHRH/utkpUxIIVRwALeJlW3S EwByDzv9dVmbw== From: Igor Belwon To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, david@mainlining.org Subject: [PATCH v1 4/7] dt-bindings: pinctrl: samsung: Add exynos990-pinctrl compatible Date: Tue, 15 Oct 2024 08:27:43 +0200 Message-ID: <20241015062746.713245-5-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> References: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a dedicated compatible for the exynos990-pinctrl node. Signed-off-by: Igor Belwon --- Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml= b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index a2af2c88a331..7e6ef8249de6 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -54,6 +54,7 @@ properties: - samsung,exynos7885-pinctrl - samsung,exynos850-pinctrl - samsung,exynos8895-pinctrl + - samsung,exynos990-pinctrl - samsung,exynosautov9-pinctrl - samsung,exynosautov920-pinctrl - tesla,fsd-pinctrl --=20 2.45.2 From nobody Wed Nov 27 00:41:14 2024 Received: from out-02.smtp.spacemail.com (out-02.smtp.spacemail.com [63.250.43.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0FB5018B460; Tue, 15 Oct 2024 06:28:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973725; cv=none; b=Tx6Cr0wvf1jzLzfND7ZlLasa9ER1j844UK8kuyCuyFn77cwzlGHi9VXxKFPq4MdXLTaTOkUwYXNXgkrgpBhQ0uZ7R1Cnytj59fVR0AZYuqN00nGPDJ6q8HG6xmqvZwAIbG0KspgBdl4UWG2xjD947fyEGUv4cyuJnJpNfOOT+rw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973725; c=relaxed/simple; bh=6iXJqsdkRbgn8i16UO7+hM+1BnZy9Hn3hwGkDSII/hw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=W5T6gwNJi0I1k03bYlWbKhpiFxrI5f6HBzlmRquoU6tD5dbzXKnCED+3Zfnda9ldJCvQOO6qhy7GXf9EGFnW7ENcnYd99FnIQNiLXSI1oJAG5xh5xHewzdH0JOWlwkANMHg3KVZL/2rIHt+A1vUBUV2cZ1FM4OY2d3FPnBHu19o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=BJgG3ZCv; arc=none smtp.client-ip=63.250.43.87 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="BJgG3ZCv" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSPLf5rRqz4wYs; Tue, 15 Oct 2024 06:28:42 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSPLV6jj2z2x99; Tue, 15 Oct 2024 06:28:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1728973717; bh=6iXJqsdkRbgn8i16UO7+hM+1BnZy9Hn3hwGkDSII/hw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BJgG3ZCvtdIO/MW34lg1+c87yW5k+HuIAo8y2DdW/RZLQZ4BhtP1W48jVrgOjzCKx fRFl4+15H8obI9wO4rwqxLgImS73R6UaYIMZJbxuAvjjq1jD7kqRjWtC7l3DDuZUTm uBp4a+7bHgJ3cVXWbsuGvIrcM/Pg6PGl5gGrcnQ+DKhuE06aJNmxInu947leBRxzZx Ulg5k2BT3xI6tY/jtnGOL3yVQZDa2pDCFeO0DbbcV7YFVJbNr5gApRrhWCxUTd7qdr +jeXs3ome929eLNCwXNa/FUvcjqzf40bG22U72Au/hDvej9JO8EkjASe0S6CURzoec hX5JRUF+Hbv3Q== From: Igor Belwon To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, david@mainlining.org Subject: [PATCH v1 5/7] dt-bindings: pinctrl: samsung: add exynos990-wakeup-eint compatible Date: Tue, 15 Oct 2024 08:27:44 +0200 Message-ID: <20241015062746.713245-6-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> References: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a dedicated compatible for the exynos990-wakeup-eint node. Signed-off-by: Igor Belwon --- .../bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wake= up-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinct= rl-wakeup-interrupt.yaml index 91516fedc872..cda5bf4cee4a 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-inte= rrupt.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-inte= rrupt.yaml @@ -43,6 +43,7 @@ properties: - samsung,exynos7885-wakeup-eint - samsung,exynos850-wakeup-eint - samsung,exynos8895-wakeup-eint + - samsung,exynos990-wakeup-eint - const: samsung,exynos7-wakeup-eint - items: - enum: --=20 2.45.2 From nobody Wed Nov 27 00:41:14 2024 Received: from out-02.smtp.spacemail.com (out-02.smtp.spacemail.com [63.250.43.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6129118B48D; Tue, 15 Oct 2024 06:28:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973731; cv=none; b=VnZFucuPrkEbMruOcfa5jNeNtZbPuwdP3OTfIc06UT5QJlAjbd72sf21omkleghbsp7TKs8F+hAvJc1/nc7St1VRJGX4XZ6n+sT4gLMRtdQyU/MpwmpWVR549gH5ELI2fZhzKsT8/XQyAZSr/5yYsyq+52HnY0aebOxeQr1Ufgk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973731; c=relaxed/simple; bh=VhOtHQIA8DgO+/IGWTrfUY4yFT/R/Ym1ElNcynqXzUk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=K36d0YvxR9STr+FnGG0WGXQ8eodPxowa8VdnJt14pbHli7rZZoqDcnoEw9MA0wloLG7S8Jhkybryp+Dhb04Yp4l4+Lu9lUOgi2VsjnmcVT9QM+L1RQYlk35pJELV3AQcpnctfeQxxCC5xBrl7bwfASPlbJvJkqGLlBWB6pm3U1c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b=DNMFP2fn; arc=none smtp.client-ip=63.250.43.87 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mentallysanemainliners.org header.i=@mentallysanemainliners.org header.b="DNMFP2fn" Received: from prod-lbout-phx.jellyfish.systems (unknown [198.177.122.3]) by smtp.spacemail.com (Postfix) with ESMTPA id 4XSPLk22vMz4wYs; Tue, 15 Oct 2024 06:28:46 +0000 (UTC) Received: from igor-systemproductname.lan (83.8.240.202.ipv4.supernova.orange.pl [83.8.240.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.spacemail.com (Postfix) with ESMTPSA id 4XSPLZ0T4Rz2x9B; Tue, 15 Oct 2024 06:28:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mentallysanemainliners.org; s=spacemail; t=1728973721; bh=VhOtHQIA8DgO+/IGWTrfUY4yFT/R/Ym1ElNcynqXzUk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DNMFP2fnUgshGASqeDOAvt0llWv/xmwyXGsOqkkY8UT0KFV2wklscztUD4QQkxpx7 MsZBZB5FAVO9WtcaqgWoWvKz+Rb2JRWk2HpvlmhstJYigQyG7I+aH1QG+JVk9v+kOz 99Zbrw7u3lQ67q3aHvGFt/3vG88cMqYvp9CwxvjbE/ljYTUm/9Qtw6eei3ocTo4cfJ ovmTxlSHYEGCmLDqcBNrw26b2KJpJVMN4D7GjjzNPU83KWibbVzwoXt1WXn6nggxUO OcnutqGh/LO51gKonzyIXe1qVoV/57kLymzrInS2dime5wDhIG31jDFuPp7z4xXtnu o0ahg7vlXXqkw== From: Igor Belwon To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, david@mainlining.org Subject: [PATCH v1 6/7] arm64: dts: exynos: Add initial support for the Exynos 990 SoC Date: Tue, 15 Oct 2024 08:27:45 +0200 Message-ID: <20241015062746.713245-7-igor.belwon@mentallysanemainliners.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> References: <20241015062746.713245-1-igor.belwon@mentallysanemainliners.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Exynos 990 SoC is an ARMv8 mobile SoC found in Samsung Galaxy N/S20 series phones (x1sxxx, c1sxxx). Add minimal support for this SoC, including: - All 8 cores via PSCI - ChipID - Generic timer. - Enumerate all pinctrl nodes The devices using this SoC suffer from the same issue as Exynos 8895 caused by the stock Samsung bootloader, as it doesn't configure CNTFRQ_EL0. Hence it's needed to hardcode the adequate frequency in the timer node, otherwise the kernel panics. Signed-off-by: Igor Belwon --- .../boot/dts/exynos/exynos990-pinctrl.dtsi | 2195 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynos990.dtsi | 241 ++ 2 files changed, 2436 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos990.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi b/arch/arm64= /boot/dts/exynos/exynos990-pinctrl.dtsi new file mode 100644 index 000000000000..a03d36458d76 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi @@ -0,0 +1,2195 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Exynos 990 pin-mux and pin-config device tree source + * + * Copyright (c) 2024, Igor Belwon + */ + +#include +#include "exynos-pinctrl.h" + +&pinctrl_alive { + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa3: gpa3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa4: gpa4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + ; + }; + + gpq0: gpq0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + speedy_bus: speedy-bus-pins { + samsung,pins =3D "gpq0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + speedy1_bus: speedy1-bus-pins { + samsung,pins =3D "gpq0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + /* UART1 is also referred to as UART_BT in downstream. */ + uart1_bus_single: uart1-bus-pins { + samsung,pins =3D "gpq0-3", "gpq0-2", "gpq0-1", "gpq0-0"; + samsung,pin-function =3D ; + samsung,pin-drv =3D ; + samsung,pin-pud =3D ; + }; + + uart1_rxd_pull: uart1-bus-rxd-pins { + samsung,pins =3D "gpq0-0"; + samsung,pin-pud =3D ; + }; + + uart1_bus_rts: uart1-bus-rts-pins { + samsung,pins =3D "gpq0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart1_bus_tx_input: uart1-bus-tx-input-pins { + samsung,pins =3D "gpq0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart1_bus_tx_dat: uart1-bus-tx-dat-pins { + samsung,pins =3D "gpq0-1"; + }; + + uart1_bus_tx_con: uart1-bus-tx-con-pins { + samsung,pins =3D "gpq0-1"; + samsung,pin-function =3D ; + }; + + wlan_host_wake: wlan-host-wake-pins { + samsung,pins =3D "gpa0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_cmgp { + gpm0: gpm0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpm1: gpm1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpm2: gpm2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpm3: gpm3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpm4: gpm4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm5: gpm5-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm6: gpm6-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm7: gpm7-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm8: gpm8-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm9: gpm9-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm10: gpm10-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm11: gpm11-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm12: gpm12-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm13: gpm13-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm14: gpm14-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm15: gpm15-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm16: gpm16-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm17: gpm17-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm18: gpm18-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm19: gpm19-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm20: gpm20-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm21: gpm21-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm22: gpm22-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm23: gpm23-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm24: gpm24-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm25: gpm25-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm26: gpm26-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm27: gpm27-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm28: gpm28-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm29: gpm29-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm30: gpm30-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm31: gpm31-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm32: gpm32-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + gpm33: gpm33-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + hsi2c38_bus: hsi2c38-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c39_bus: hsi2c39-bus-pins { + samsung,pins =3D "gpm2-0", "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c40_bus: hsi2c40-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c41_bus: hsi2c41-bus-pins { + samsung,pins =3D "gpm6-0", "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c42_bus: hsi2c42-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c43_bus: hsi2c43-bus-pins { + samsung,pins =3D "gpm10-0", "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c44_bus: hsi2c44-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c45_bus: hsi2c45-bus-pins { + samsung,pins =3D "gpm14-0", "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi19_bus: spi19-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0", "gpm2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi19_cs: spi19-cs-pins { + samsung,pins =3D "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi19_cs_func: spi19-cs-func-pins { + samsung,pins =3D "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi20_bus: spi20-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0", "gpm6-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi20_cs: spi20-cs-pins { + samsung,pins =3D "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi20_cs_func: spi20-cs-func-pins { + samsung,pins =3D "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi21_bus: spi21-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0", "gpm10-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi21_cs: spi21-cs-pins { + samsung,pins =3D "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi21_cs_func: spi21-cs-func-pins { + samsung,pins =3D "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi22_bus: spi22-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0", "gpm14-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi22_cs: spi22-cs-pins { + samsung,pins =3D "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi22_cs_func: spi22-cs-func-pins { + samsung,pins =3D "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart21_bus_single: uart21-bus-pins { + samsung,pins =3D "gpm0-0", "gpm1-0", "gpm2-0", "gpm3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart21_bus_dual: uart21-bus-dual-pins { + samsung,pins =3D "gpm0-0", "gpm1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart22_bus_single: uart22-bus-pins { + samsung,pins =3D "gpm4-0", "gpm5-0", "gpm6-0", "gpm7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart22_bus_dual: uart22-bus-dual-pins { + samsung,pins =3D "gpm4-0", "gpm5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart23_bus_single: uart23-bus-pins { + samsung,pins =3D "gpm8-0", "gpm9-0", "gpm10-0", "gpm11-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart23_bus_dual: uart23-bus-dual-pins { + samsung,pins =3D "gpm8-0", "gpm9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart24_bus_single: uart24-bus-pins { + samsung,pins =3D "gpm12-0", "gpm13-0", "gpm14-0", "gpm15-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart24_bus_dual: uart24-bus-dual-pins { + samsung,pins =3D "gpm12-0", "gpm13-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_hsi1 { + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf2: gpf2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + pcie0_clkreq: pcie0-clkreq-pins { + samsung,pins =3D "gpf0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + pcie0_perst: pcie0-perst-pins { + samsung,pins =3D "gpf0-1"; + samsung,pin-function =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + }; + + pcie1_clkreq: pcie1-clkreq-pins { + samsung,pins =3D "gpf0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + pcie1_perst: pcie1-perst-pins { + samsung,pins =3D "gpf0-3"; + samsung,pin-function =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins =3D "gpf2-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins =3D "gpf2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins =3D "gpf1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins =3D "gpf1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins =3D "gpf1-3", "gpf1-4", "gpf1-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_1_5x: sd2-clk-fast-slew-rate-1-5x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_2_5x: sd2-clk-fast-slew-rate-2-5x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk-fas-slew-rate-3x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins { + samsung,pins =3D "gpf1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_pins_as_pdn: sd2-pins-as-pdn-pins { + samsung,pins =3D "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4", "gpf1= -5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_hsi2 { + gpf3: gpf3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + pcie2_clkreq: pcie2-clkreq-pins { + samsung,pins =3D "gpf3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + pcie2_perst: pcie2-perst-pins { + samsung,pins =3D "gpf3-1"; + samsung,pin-function =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + }; +}; + +&pinctrl_peric0 { + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp0: gpp0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp1: gpp1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp2: gpp2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp3: gpp3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp4: gpp4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins =3D "gpp0-0", "gpp0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins =3D "gpp0-2", "gpp0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins =3D "gpp0-4", "gpp0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins =3D "gpp0-6", "gpp0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins =3D "gpp1-0", "gpp1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins =3D "gpp1-2", "gpp1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins =3D "gpp1-4", "gpp1-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins =3D "gpp1-6", "gpp1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins =3D "gpp2-0", "gpp2-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins =3D "gpp2-2", "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins =3D "gpp2-4", "gpp2-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins =3D "gpp2-6", "gpp2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c26_bus: hsi2c26-bus-pins { + samsung,pins =3D "gpp3-0", "gpp3-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c27_bus: hsi2c27-bus-pins { + samsung,pins =3D "gpp3-2", "gpp3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + hsi2c28_bus: hsi2c28-bus-pins { + samsung,pins =3D "gpp3-4", "gpp3-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c29_bus: hsi2c29-bus-pins { + samsung,pins =3D "gpp3-6", "gpp3-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c30_bus: hsi2c30-bus-pins { + samsung,pins =3D "gpp4-0", "gpp4-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c31_bus: hsi2c31-bus-pins { + samsung,pins =3D "gpp4-2", "gpp4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins =3D "gpp0-2", "gpp0-1", "gpp0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins =3D "gpp0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_cs_func: spi0-cs-func-pins { + samsung,pins =3D "gpp0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_bus: spi1-bus-pins { + samsung,pins =3D "gpp0-6", "gpp0-5", "gpp0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins =3D "gpp0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_cs_func: spi1-cs-func-pins { + samsung,pins =3D "gpp0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_bus: spi2-bus-pins { + samsung,pins =3D "gpp1-2", "gpp1-1", "gpp1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins =3D "gpp1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_cs_func: spi2-cs-func-pins { + samsung,pins =3D "gpp1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_bus: spi3-bus-pins { + samsung,pins =3D "gpp1-6", "gpp1-5", "gpp1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins =3D "gpp1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_cs_func: spi3-cs-func-pins { + samsung,pins =3D "gpp1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_bus: spi4-bus-pins { + samsung,pins =3D "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins =3D "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_cs_func: spi4-cs-func-pins { + samsung,pins =3D "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_fp_inactive: spi4-fp-inactive-pins { + samsung,pins =3D "gpp2-3", "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_fp_cs_func_high: spi4-fp-cs-func-high-pins { + samsung,pins =3D "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_bus: spi5-bus-pins { + samsung,pins =3D "gpp2-6", "gpp2-5", "gpp2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins =3D "gpp2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_cs_func: spi5-cs-func-pins { + samsung,pins =3D "gpp2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_bus: spi13-bus-pins { + samsung,pins =3D "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_cs: spi13-cs-pins { + samsung,pins =3D "gpp3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_cs_func: spi13-cs-func-pins { + samsung,pins =3D "gpp3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_bus: spi14-bus-pins { + samsung,pins =3D "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_cs: spi14-cs-pins { + samsung,pins =3D "gpp3-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_cs_func: spi14-cs-func-pins { + samsung,pins =3D "gpp3-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_bus: spi15-bus-pins { + samsung,pins =3D "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_cs: spi15-cs-pins { + samsung,pins =3D "gpp4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_cs_func: spi15-cs-func-pins { + samsung,pins =3D "gpp4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart0_bus: uart0-bus-pins { + samsung,pins =3D "gpp4-6", "gpp4-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart2_bus_single: uart2-bus-pins { + samsung,pins =3D "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins =3D "gpp0-0", "gpp0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus_single: uart3-bus-pins { + samsung,pins =3D "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins =3D "gpp0-4", "gpp0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus_single: uart4-bus-pins { + samsung,pins =3D "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins =3D "gpp1-0", "gpp1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus_single: uart5-bus-pins { + samsung,pins =3D "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins =3D "gpp1-4", "gpp1-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart6_bus_single: uart6-bus-pins { + samsung,pins =3D "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins =3D "gpp2-0", "gpp2-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart7_bus_single: uart7-bus-pins { + samsung,pins =3D "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins =3D "gpp2-4", "gpp2-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart15_bus_single: uart15-bus-pins { + samsung,pins =3D "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart15_bus_dual: uart15-bus-dual-pins { + samsung,pins =3D "gpp3-0", "gpp3-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart16_bus_single: uart16-bus-pins { + samsung,pins =3D "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart16_bus_dual: uart16-bus-dual-pins { + samsung,pins =3D "gpp3-4", "gpp3-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart17_bus_single: uart17-bus-pins { + samsung,pins =3D "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart17_bus_dual: uart17-bus-dual-pins { + samsung,pins =3D "gpp4-0", "gpp4-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_peric1 { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg1: gpg1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp5: gpp5-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp6: gpp6-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp7: gpp7-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp8: gpp8-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpp9: gpp9-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + aud_i2s0_bus: aud-i2s0-bus-pins { + samsung,pins =3D "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s0_idle: aud-i2s0-idle-pins { + samsung,pins =3D "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s1_bus: aud-i2s1-bus-pins { + samsung,pins =3D "gpb0-4", "gpb0-5", "gpb0-6", "gpb0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s1_idle: aud-i2s1-idle-pins { + samsung,pins =3D "gpb0-4", "gpb0-5", "gpb0-6", "gpb0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s2_bus: aud-i2s2-bus-pins { + samsung,pins =3D "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s2_idle: aud-i2s2-idle-pins { + samsung,pins =3D "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s3_bus: aud-i2s3-bus-pins { + samsung,pins =3D "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s3_idle: aud-i2s3-idle-pins { + samsung,pins =3D "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s4_bus: aud-i2s4-bus-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s4_pci: aud-i2s4-pci-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s4_idle: aud-i2s4-idle-pins { + samsung,pins =3D "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s5_bus: aud-i2s5-bus-pins { + samsung,pins =3D "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_i2s5_idle: aud-i2s5-idle-pins { + samsung,pins =3D "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_dsd_bus: aud-dsd-bus-pins { + samsung,pins =3D "gpb2-4", "gpb2-5", "gpb2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + aud_dsd_idle: aud-dsd-idle-pins { + samsung,pins =3D "gpb2-4", "gpb2-5", "gpb2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + cfg_wlanen: cfg-wlanen-pins { + samsung,pins =3D "gpb0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + cnss_wlan_en_active: cnss-wlan-en-active-pins { + samsung,pins =3D "gpb0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + cnss_wlan_en_sleep: cnss-wlan-en-sleep-pins { + samsung,pins =3D "gpb0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + decon_f_te_on: decon-f-te-on-pins { + samsung,pins =3D "gpc0-4"; + samsung,pin-function =3D <0xf>; + }; + + decon_f_te_off: decon-f-te-off-pins { + samsung,pins =3D "gpc0-4"; + samsung,pin-function =3D ; + }; + + decon_s_te_on: decon-s-te-on-pins { + samsung,pins =3D "gpc0-5"; + samsung,pin-function =3D <0xf>; + }; + + decon_s_te_off: decon-s-te-off-pins { + samsung,pins =3D "gpc0-5"; + samsung,pin-function =3D ; + }; + + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins =3D "gpp5-0", "gpp5-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins =3D "gpp5-2", "gpp5-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins =3D "gpp5-4", "gpp5-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins =3D "gpp5-6", "gpp5-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins =3D "gpp6-0", "gpp6-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins =3D "gpp6-2", "gpp6-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins =3D "gpp6-4", "gpp6-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins =3D "gpp6-6", "gpp6-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins =3D "gpp7-0", "gpp7-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins =3D "gpp7-2", "gpp7-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins =3D "gpp7-4", "gpp7-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins =3D "gpp7-6", "gpp7-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c24_bus: hsi2c24-bus-pins { + samsung,pins =3D "gpp8-0", "gpp8-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c25_bus: hsi2c25-bus-pins { + samsung,pins =3D "gpp8-2", "gpp8-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c32_bus: hsi2c32-bus-pins { + samsung,pins =3D "gpp8-4", "gpp8-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c33_bus: hsi2c33-bus-pins { + samsung,pins =3D "gpp8-6", "gpp8-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c34_bus: hsi2c34-bus-pins { + samsung,pins =3D "gpp9-0", "gpp9-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c35_bus: hsi2c35-bus-pins { + samsung,pins =3D "gpp9-2", "gpp9-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c36_bus: hsi2c36-bus-pins { + samsung,pins =3D "gpp9-4", "gpp9-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c37_bus: hsi2c37-bus-pins { + samsung,pins =3D "gpp9-6", "gpp9-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk0_out: sensor-mclk0-out-pins { + samsung,pins =3D "gpc0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk1_out: sensor-mclk1-out-pins { + samsung,pins =3D "gpg1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk2_out: sensor-mclk2-out-pins { + samsung,pins =3D "gpc0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk3_out: sensor-mclk3-out-pins { + samsung,pins =3D "gpc0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk4_out: sensor-mclk4-out-pins { + samsung,pins =3D "gpc0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk5_out: sensor-mclk5-out-pins { + samsung,pins =3D "gpg1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk0_fn: sensor-mclk0-fn-pins { + samsung,pins =3D "gpc0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk1_fn: sensor-mclk1-fn-pins { + samsung,pins =3D "gpg1-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk2_fn: sensor-mclk2-fn-pins { + samsung,pins =3D "gpc0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk3_fn: sensor-mclk3-fn-pins { + samsung,pins =3D "gpc0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk4_fn: sensor-mclk4-fn-pins { + samsung,pins =3D "gpc0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sensor_mclk5_fn: sensor-mclk5-fn-pins { + samsung,pins =3D "gpg1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_bus: spi6-bus-pins { + samsung,pins =3D "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins =3D "gpp5-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_cs_func: spi6-cs-func-pins { + samsung,pins =3D "gpp5-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_bus: spi7-bus-pins { + samsung,pins =3D "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins =3D "gpp5-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_cs_func: spi7-cs-func-pins { + samsung,pins =3D "gpp5-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_bus: spi8-bus-pins { + samsung,pins =3D "gpp6-2", "gpp6-1", "gpp6-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins =3D "gpp6-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_cs_func: spi8-cs-func-pins { + samsung,pins =3D "gpp6-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_bus: spi9-bus-pins { + samsung,pins =3D "gpp6-6", "gpp6-5", "gpp6-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins =3D "gpp6-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_cs_func: spi9-cs-func-pins { + samsung,pins =3D "gpp6-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_bus: spi10-bus-pins { + samsung,pins =3D "gpp7-2", "gpp7-1", "gpp7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins =3D "gpp7-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_cs_func: spi10-cs-func-pins { + samsung,pins =3D "gpp7-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_bus: spi11-bus-pins { + samsung,pins =3D "gpp7-6", "gpp7-5", "gpp7-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins =3D "gpp7-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_cs_func: spi11-cs-func-pins { + samsung,pins =3D "gpp7-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_bus: spi12-bus-pins { + samsung,pins =3D "gpp8-2", "gpp8-1", "gpp8-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_cs: spi12-cs-pins { + samsung,pins =3D "gpp8-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_cs_func: spi12-cs-func-pins { + samsung,pins =3D "gpp8-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi16_bus: spi16-bus-pins { + samsung,pins =3D "gpp8-6", "gpp8-5", "gpp8-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + spi16_cs: spi16-cs-pins { + samsung,pins =3D "gpp8-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi16_cs_func: spi16-cs-func-pins { + samsung,pins =3D "gpp8-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + spi17_bus: spi17-bus-pins { + samsung,pins =3D "gpp9-2", "gpp9-1", "gpp9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi17_cs: spi17-cs-pins { + samsung,pins =3D "gpp9-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi17_cs_func: spi17-cs-func-pins { + samsung,pins =3D "gpp9-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi18_bus: spi18-bus-pins { + samsung,pins =3D "gpp9-6", "gpp9-5", "gpp9-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi18_cs: spi18-cs-pins { + samsung,pins =3D "gpp9-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi18_cs_func: spi18-cs-func-pins { + samsung,pins =3D "gpp9-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart8_bus_single: uart8-bus-pins { + samsung,pins =3D "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins =3D "gpp5-0", "gpp5-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart9_bus_single: uart9-bus-pins { + samsung,pins =3D "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins =3D "gpp5-4", "gpp5-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart10_bus_single: uart10-bus-pins { + samsung,pins =3D "gpp6-3", "gpp6-2", "gpp6-1", "gpp6-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins =3D "gpp6-0", "gpp6-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart11_bus_single: uart11-bus-pins { + samsung,pins =3D "gpp6-7", "gpp6-6", "gpp6-5", "gpp6-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins =3D "gpp6-4", "gpp6-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart12_bus_single: uart12-bus-pins { + samsung,pins =3D "gpp7-3", "gpp7-2", "gpp7-1", "gpp7-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart12_bus_dual: uart12-bus-dual-pins { + samsung,pins =3D "gpp7-0", "gpp7-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart13_bus_single: uart13-bus-pins { + samsung,pins =3D "gpp7-7", "gpp7-6", "gpp7-5", "gpp7-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart13_bus_dual: uart13-bus-dual-pins { + samsung,pins =3D "gpp7-4", "gpp7-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart14_bus_single: uart14-bus-pins { + samsung,pins =3D "gpp8-3", "gpp8-2", "gpp8-1", "gpp8-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart14_bus_dual: uart14-bus-dual-pins { + samsung,pins =3D "gpp8-0", "gpp8-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart18_bus_single: uart18-bus-pins { + samsung,pins =3D "gpp8-7", "gpp8-6", "gpp8-5", "gpp8-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart18_bus_dual: uart18-bus-dual-pins { + samsung,pins =3D "gpp8-4", "gpp8-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart19_bus_single: uart19-bus-pins { + samsung,pins =3D "gpp9-3", "gpp9-2", "gpp9-1", "gpp9-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart19_bus_dual: uart19-bus-dual-pins { + samsung,pins =3D "gpp9-0", "gpp9-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart20_bus_single: uart20-bus-pins { + samsung,pins =3D "gpp9-7", "gpp9-6", "gpp9-5", "gpp9-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart20_bus_dual: uart20-bus-dual-pins { + samsung,pins =3D "gpp9-4", "gpp9-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_vts { + gpv0: gpv0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + amic_pdm: amic-pdm-pins { + samsung,pins =3D "gpv0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk: dmic-bus-clk-pins { + samsung,pins =3D "gpv0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk_idle: dmic-bus-clk-idle-pins { + samsung,pins =3D "gpv0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk1: dmic-bus-clk1-pins { + samsung,pins =3D "gpv0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk1_idle: dmic-bus-clk1-idle-pins { + samsung,pins =3D "gpv0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk2: dmic-bus-clk2-pins { + samsung,pins =3D "gpv0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_bus_clk2_idle: dmic-bus-clk2-idle-pins { + samsung,pins =3D "gpv0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm: dmic-pdm-pins { + samsung,pins =3D "gpv0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm_idle: dmic-pdm-idle-pins { + samsung,pins =3D "gpv0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm1_bus: dmic-pdm1-bus-pins { + samsung,pins =3D "gpv0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm1_idle: dmic-pdm1-idle-pins { + samsung,pins =3D "gpv0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm2_bus: dmic-pdm2-bus-pins { + samsung,pins =3D "gpv0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + dmic_pdm2_idle: dmic-pdm2-idle-pins { + samsung,pins =3D "gpv0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dt= s/exynos/exynos990.dtsi new file mode 100644 index 000000000000..53bb298ea68c --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Exynos 990 SoC device tree source + * + * Copyright (c) 2024, Igor Belwon + */ + +#include + +/ { + compatible =3D "samsung,exynos990"; + #address-cells =3D <2>; + #size-cells =3D <1>; + + interrupt-parent =3D <&gic>; + + arm-a55-pmu { + compatible =3D "arm,cortex-a55-pmu"; + interrupts =3D , + , + , + ; + + interrupt-affinity =3D <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + arm-a76-pmu { + compatible =3D "arm,cortex-a76-pmu"; + interrupts =3D , + ; + + interrupt-affinity =3D <&cpu4>, + <&cpu5>; + }; + + /* There's no PMU model for cluster2, which are the Mongoose cores. */ + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu0>; + }; + + core1 { + cpu =3D <&cpu1>; + }; + + core2 { + cpu =3D <&cpu2>; + }; + + core3 { + cpu =3D <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu4>; + }; + + core1 { + cpu =3D <&cpu5>; + }; + }; + + cluster2 { + core0 { + cpu =3D <&cpu6>; + }; + + core1 { + cpu =3D <&cpu7>; + }; + }; + }; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0>; + enable-method =3D "psci"; + }; + + cpu1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x1>; + enable-method =3D "psci"; + }; + + cpu2: cpu@2 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x2>; + enable-method =3D "psci"; + }; + + cpu3: cpu@3 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x3>; + enable-method =3D "psci"; + }; + + cpu4: cpu@100 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a76"; + reg =3D <0x4>; + enable-method =3D "psci"; + }; + + cpu5: cpu@101 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a76"; + reg =3D <0x5>; + enable-method =3D "psci"; + }; + + cpu6: cpu@200 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m5"; + reg =3D <0x6>; + enable-method =3D "psci"; + }; + + cpu7: cpu@201 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m5"; + reg =3D <0x7>; + enable-method =3D "psci"; + }; + + }; + + psci { + compatible =3D "arm,psci-0.2"; + method =3D "hvc"; + }; + + oscclk: osc-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-output-names =3D "oscclk"; + }; + + soc: soc@0 { + compatible =3D "simple-bus"; + ranges =3D <0x0 0x0 0x0 0x20000000>; + + #address-cells =3D <1>; + #size-cells =3D <1>; + + chipid@10000000 { + compatible =3D "samsung,exynos990-chipid", + "samsung,exynos850-chipid"; + reg =3D <0x10000000 0x100>; + }; + + gic: interrupt-controller@10101000 { + compatible =3D "arm,gic-400"; + #interrupt-cells =3D <3>; + interrupt-controller; + reg =3D <0x10101000 0x1000>, + <0x10102000 0x1000>, + <0x10104000 0x2000>, + <0x10106000 0x2000>; + interrupts =3D ; + #address-cells =3D <0>; + #size-cells =3D <1>; + }; + + pinctrl_cmgp: pinctrl@15c30000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x15c30000 0x1000>; + }; + + pinctrl_hsi1: pinctrl@13040000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x13040000 0x1000>; + interrupts =3D ; + }; + + pinctrl_hsi2: pinctrl@13c30000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x13c30000 0x1000>; + interrupts =3D ; + }; + + pinctrl_peric0: pinctrl@10430000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x10430000 0x1000>; + interrupts =3D ; + }; + + pinctrl_peric1: pinctrl@10730000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x10730000 0x1000>; + interrupts =3D ; + }; + + pinctrl_vts: pinctrl@15580000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x15580000 0x1000>; + }; + + pinctrl_alive: pinctrl@15850000 { + compatible =3D "samsung,exynos990-pinctrl"; + reg =3D <0x15850000 0x1000>; + + wakeup-interrupt-controller { + compatible =3D "samsung,exynos990-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + }; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + + /* + * Non-updatable, broken stock Samsung bootloader does not + * configure CNTFRQ_EL0 + */ + clock-frequency =3D <26000000>; + }; +}; + +#include "exynos990-pinctrl.dtsi" --=20 2.45.2 From nobody Wed Nov 27 00:41:14 2024 Received: from out-03.smtp.spacemail.com (out-03.smtp.spacemail.com [63.250.43.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E412189BB3; Tue, 15 Oct 2024 06:28:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=63.250.43.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728973732; cv=none; b=HBtrhzlOwj6TzuoizdMeyUDZPAY9ZmtZFZ+2YO6FUj0PwMzJPxsqJCO8jF3mexArlQc0FKPbZ6vPjAzjA7uX4JQP2oCM8mylZpM4UIwOeHz0s/6jevgm6TD9jXEMMbZW97KDiyxFUmArmhH4FpZmw/rXMaDsWXtsLn0Nc3/r44c= ARC-Message-Signature: i=1; a=rsa-sha256; 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charset="utf-8" Add initial support for the Samsung Galaxy Note20 5G (c1s/SM-N981B) phone. It was launched in 2020, and it's based on the Exynos 990 SoC. It has only one configuration with 8GB of RAM, albeit storage options may differ. This device tree adds support for the following: - SimpleFB - 8GB RAM - Buttons Signed-off-by: Igor Belwon --- arch/arm64/boot/dts/exynos/Makefile | 1 + arch/arm64/boot/dts/exynos/exynos990-c1s.dts | 111 +++++++++++++++++++ 2 files changed, 112 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos990-c1s.dts diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exyn= os/Makefile index 18f5a3eed523..7a934499b235 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -8,5 +8,6 @@ dtb-$(CONFIG_ARCH_EXYNOS) +=3D \ exynos7885-jackpotlte.dtb \ exynos850-e850-96.dtb \ exynos8895-dreamlte.dtb \ + exynos990-c1s.dtb \ exynosautov9-sadk.dtb \ exynosautov920-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts b/arch/arm64/boot= /dts/exynos/exynos990-c1s.dts new file mode 100644 index 000000000000..7bff098d7982 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos990-c1s.dts @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Galaxy Note20 5G (c1s/SM-N981B) device tree source + * + * Copyright (c) 2024, Igor Belwon + */ + +/dts-v1/; +#include "exynos990.dtsi" +#include +#include +#include + +/ { + model =3D "Samsung Galaxy Note20"; + compatible =3D "samsung,c1s", "samsung,exynos990"; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges; + + framebuffer0: framebuffer@f1000000 { + compatible =3D "simple-framebuffer"; + reg =3D <0 0xf1000000 (1080 * 2400 * 4)>; + width =3D <1080>; + height =3D <2400>; + stride =3D <(1080 * 4)>; + format =3D "a8r8g8b8"; + }; + }; + + memory@80001000 { + device_type =3D "memory"; + reg =3D <0x0 0x80000000 0x3ab00000>, + /* Memory hole */ + <0x0 0xc1200000 0x1ed80000>, + /* Memory hole */ + <0x0 0xe1900000 0x1a8e9800>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges; + + cont_splash_mem: framebuffer@f1000000 { + reg =3D <0 0xf1000000 0x13c6800>; + no-map; + }; + + abox_reserved: audio@f7fb0000 { + reg =3D <0 0xf7fb0000 0x2a50000>; + no-map; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&key_power &key_voldown &key_volup>; + pinctrl-names =3D "default"; + + power-key { + label =3D "Power"; + linux,code =3D ; + gpios =3D <&gpa2 4 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + voldown-key { + label =3D "Volume Down"; + linux,code =3D ; + gpios =3D <&gpa0 4 GPIO_ACTIVE_LOW>; + }; + + volup-key { + label =3D "Volume Up"; + linux,code =3D ; + gpios =3D <&gpa0 3 GPIO_ACTIVE_LOW>; + }; + + }; +}; + +&oscclk { + clock-frequency =3D <26000000>; +}; + +&pinctrl_alive { + key_power: key-power-pins { + samsung,pins =3D "gpa2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + key_voldown: key-voldown-pins { + samsung,pins =3D "gpa0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + key_volup: key-volup-pins { + samsung,pins =3D "gpa0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; --=20 2.45.2