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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The pinctrl aobus/cbus was originally here to configure the GPIO interrupt, but it was a bad design and was moved to a separate gpio_intc node because the GPIO interrupt is actually separate from the pinctrl/gpio registers. Drop this reg entry, and fix all the register offsets with a proper range property. Cc: Martin Blumenstingl Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Tested-by: Martin Blumenstingl # Odroi= d-C1 --- arch/arm/boot/dts/amlogic/meson8.dtsi | 28 +++++++++++++--------------- arch/arm/boot/dts/amlogic/meson8b.dtsi | 28 +++++++++++++--------------- 2 files changed, 26 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/amlogic/meson8.dtsi b/arch/arm/boot/dts/amlo= gic/meson8.dtsi index 6c7596c8b96b..9ff142d9fe3f 100644 --- a/arch/arm/boot/dts/amlogic/meson8.dtsi +++ b/arch/arm/boot/dts/amlogic/meson8.dtsi @@ -346,17 +346,16 @@ pmu: pmu@e0 { reg =3D <0xe0 0x18>; }; =20 - pinctrl_aobus: pinctrl@84 { + pinctrl_aobus: pinctrl@14 { compatible =3D "amlogic,meson8-aobus-pinctrl"; - reg =3D <0x84 0xc>; #address-cells =3D <1>; #size-cells =3D <1>; - ranges; + ranges =3D <0x0 0x14 0x1c>; =20 - gpio_ao: bank@14 { - reg =3D <0x14 0x4>, - <0x2c 0x4>, - <0x24 0x8>; + gpio_ao: bank@0 { + reg =3D <0x0 0x4>, + <0x18 0x4>, + <0x10 0x8>; reg-names =3D "mux", "pull", "gpio"; gpio-controller; #gpio-cells =3D <2>; @@ -461,18 +460,17 @@ clock-measure@8758 { reg =3D <0x8758 0x1c>; }; =20 - pinctrl_cbus: pinctrl@9880 { + pinctrl_cbus: pinctrl@8030 { compatible =3D "amlogic,meson8-cbus-pinctrl"; - reg =3D <0x9880 0x10>; #address-cells =3D <1>; #size-cells =3D <1>; - ranges; + ranges =3D <0x0 0x8030 0x108>; =20 - gpio: bank@80b0 { - reg =3D <0x80b0 0x28>, - <0x80e8 0x18>, - <0x8120 0x18>, - <0x8030 0x30>; + gpio: bank@80 { + reg =3D <0x80 0x28>, + <0xb8 0x18>, + <0xf0 0x18>, + <0x00 0x30>; reg-names =3D "mux", "pull", "pull-enable", "gpio"; gpio-controller; #gpio-cells =3D <2>; diff --git a/arch/arm/boot/dts/amlogic/meson8b.dtsi b/arch/arm/boot/dts/aml= ogic/meson8b.dtsi index c8fbeede7e38..9e02a97f86a0 100644 --- a/arch/arm/boot/dts/amlogic/meson8b.dtsi +++ b/arch/arm/boot/dts/amlogic/meson8b.dtsi @@ -308,17 +308,16 @@ pmu: pmu@e0 { reg =3D <0xe0 0x18>; }; =20 - pinctrl_aobus: pinctrl@84 { + pinctrl_aobus: pinctrl@14 { compatible =3D "amlogic,meson8b-aobus-pinctrl"; - reg =3D <0x84 0xc>; #address-cells =3D <1>; #size-cells =3D <1>; - ranges; + ranges =3D <0x0 0x14 0x1c>; =20 - gpio_ao: bank@14 { - reg =3D <0x14 0x4>, - <0x2c 0x4>, - <0x24 0x8>; + gpio_ao: bank@0 { + reg =3D <0x0 0x4>, + <0x18 0x4>, + <0x10 0x8>; reg-names =3D "mux", "pull", "gpio"; gpio-controller; #gpio-cells =3D <2>; @@ -415,18 +414,17 @@ clock-measure@8758 { reg =3D <0x8758 0x1c>; }; =20 - pinctrl_cbus: pinctrl@9880 { + pinctrl_cbus: pinctrl@8030 { compatible =3D "amlogic,meson8b-cbus-pinctrl"; - reg =3D <0x9880 0x10>; #address-cells =3D <1>; #size-cells =3D <1>; - ranges; + ranges =3D <0x0 0x8030 0x108>; =20 - gpio: bank@80b0 { - reg =3D <0x80b0 0x28>, - <0x80e8 0x18>, - <0x8120 0x18>, - <0x8030 0x38>; + gpio: bank@80 { + reg =3D <0x80 0x28>, + <0xb8 0x18>, + <0xf0 0x18>, + <0x00 0x38>; reg-names =3D "mux", "pull", "pull-enable", "gpio"; gpio-controller; #gpio-cells =3D <2>; --- base-commit: b852e1e7a0389ed6168ef1d38eb0bad71a6b11e8 change-id: 20241015-topic-amlogic-arm32-upstream-bindings-fixes-pinctrl-dtb= s-d7c996fd4116 Best regards, --=20 Neil Armstrong