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EdgeLock Enclave has a hardware limitation of restricted access to DDR address: 0x80000000 to 0xAFFFFFFF, so reserve 1MB of DDR memory region from 0x80000000. Signed-off-by: Pankaj Gupta --- arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 17 ++++++++++++++++- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 13 +++++++++++-- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boo= t/dts/freescale/imx8ulp-evk.dts index 24bb253b938d..ca8958f28a83 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2024 NXP */ =20 /dts-v1/; @@ -19,6 +19,17 @@ memory@80000000 { device_type =3D "memory"; reg =3D <0x0 0x80000000 0 0x80000000>; }; + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + ele_reserved: ele-reserved@90000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x90000000 0 0x100000>; + no-map; + }; + }; =20 reserved-memory { #address-cells =3D <2>; @@ -146,6 +157,10 @@ &usdhc0 { status =3D "okay"; }; =20 +&ele_if0 { + memory-region =3D <&ele_reserved>; +}; + &fec { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&pinctrl_enet>; diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/d= ts/freescale/imx8ulp.dtsi index c460afaa76f5..914d61b2275c 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2024 NXP */ =20 #include @@ -152,7 +152,7 @@ sosc: clock-sosc { #clock-cells =3D <0>; }; =20 - sram@2201f000 { + sram0: sram@2201f000 { compatible =3D "mmio-sram"; reg =3D <0x0 0x2201f000 0x0 0x1000>; =20 @@ -167,6 +167,8 @@ scmi_buf: scmi-sram-section@0 { }; =20 firmware { + #address-cells =3D <1>; + #size-cells =3D <0>; scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0xc20000fe>; @@ -184,6 +186,13 @@ scmi_sensor: protocol@15 { #thermal-sensor-cells =3D <1>; }; }; + + ele_if0: secure-enclave { + compatible =3D "fsl,imx8ulp-se"; + mbox-names =3D "tx", "rx"; + mboxes =3D <&s4muap 0 0>, <&s4muap 1 0>; + sram =3D <&sram0>; + }; }; =20 cm33: remoteproc-cm33 { --=20 2.34.1