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[185.246.87.17]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4313f56f241sm18848295e9.22.2024.10.15.06.56.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Oct 2024 06:56:36 -0700 (PDT) From: Guillaume Stols Date: Tue, 15 Oct 2024 13:56:18 +0000 Subject: [PATCH v5 5/8] iio: adc: ad7606: Add compatibility to fw_nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241015-ad7606_add_iio_backend_support-v5-5-654faf1ae08c@baylibre.com> References: <20241015-ad7606_add_iio_backend_support-v5-0-654faf1ae08c@baylibre.com> In-Reply-To: <20241015-ad7606_add_iio_backend_support-v5-0-654faf1ae08c@baylibre.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , "Rafael J. Wysocki" , Jonathan Corbet Cc: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Hennerich , linux-fbdev@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, aardelean@baylibre.com, dlechner@baylibre.com, jstephan@baylibre.com, nuno.sa@analog.com, Jonathan Cameron , Guillaume Stols X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729000592; l=20772; i=gstols@baylibre.com; s=20240417; h=from:subject:message-id; bh=p5W7C9eFQDZ97zIyZZtTH6VbXAEzZrNsKQ8f3gAiwNE=; b=jEWYPIumcW14EL7S3zdjULrVgwT+Dc6SVyQkhidG17sm5Dsd6l/RZ4m2VS0CBNGPBtjdWTxct F28NtKYqmKaBN77fFNNpXu2JxPV7/B5mxiIS/9Soe3Z4hWNIGk+MsoK X-Developer-Key: i=gstols@baylibre.com; a=ed25519; pk=XvMm5WHuV67sGYOJZqIYzXndbaJOlNd8Q6li6vnb4Cs= On the parallel version, the current implementation is only compatible with id tables and won't work with fw_nodes, this commit intends to fix it. Doing so required to declare ad7606_chip_info structures in the .h file so to make them accessible to all the driver files that can set a pointer to the corresponding chip as the driver data. Signed-off-by: Guillaume Stols --- drivers/iio/adc/ad7606.c | 283 ++++++++++++++++++++++++---------------= ---- drivers/iio/adc/ad7606.h | 32 +++-- drivers/iio/adc/ad7606_par.c | 30 +++-- drivers/iio/adc/ad7606_spi.c | 96 +++++++++------ 4 files changed, 254 insertions(+), 187 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index dd4e0c6fce3e..72e0864ba9e4 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -78,6 +78,155 @@ static const unsigned int ad7616_oversampling_avail[8] = =3D { 1, 2, 4, 8, 16, 32, 64, 128, }; =20 +static const struct iio_chan_spec ad7605_channels[] =3D { + IIO_CHAN_SOFT_TIMESTAMP(4), + AD7605_CHANNEL(0), + AD7605_CHANNEL(1), + AD7605_CHANNEL(2), + AD7605_CHANNEL(3), +}; + +static const struct iio_chan_spec ad7606_channels_16bit[] =3D { + IIO_CHAN_SOFT_TIMESTAMP(8), + AD7606_CHANNEL(0, 16), + AD7606_CHANNEL(1, 16), + AD7606_CHANNEL(2, 16), + AD7606_CHANNEL(3, 16), + AD7606_CHANNEL(4, 16), + AD7606_CHANNEL(5, 16), + AD7606_CHANNEL(6, 16), + AD7606_CHANNEL(7, 16), +}; + +static const struct iio_chan_spec ad7606_channels_18bit[] =3D { + IIO_CHAN_SOFT_TIMESTAMP(8), + AD7606_CHANNEL(0, 18), + AD7606_CHANNEL(1, 18), + AD7606_CHANNEL(2, 18), + AD7606_CHANNEL(3, 18), + AD7606_CHANNEL(4, 18), + AD7606_CHANNEL(5, 18), + AD7606_CHANNEL(6, 18), + AD7606_CHANNEL(7, 18), +}; + +/* + * The current assumption that this driver makes for AD7616, is that it's + * working in Hardware Mode with Serial, Burst and Sequencer modes activat= ed. + * To activate them, following pins must be pulled high: + * -SER/PAR + * -SEQEN + * And following pins must be pulled low: + * -WR/BURST + * -DB4/SER1W + */ +static const struct iio_chan_spec ad7616_channels[] =3D { + IIO_CHAN_SOFT_TIMESTAMP(16), + AD7606_CHANNEL(0, 16), + AD7606_CHANNEL(1, 16), + AD7606_CHANNEL(2, 16), + AD7606_CHANNEL(3, 16), + AD7606_CHANNEL(4, 16), + AD7606_CHANNEL(5, 16), + AD7606_CHANNEL(6, 16), + AD7606_CHANNEL(7, 16), + AD7606_CHANNEL(8, 16), + AD7606_CHANNEL(9, 16), + AD7606_CHANNEL(10, 16), + AD7606_CHANNEL(11, 16), + AD7606_CHANNEL(12, 16), + AD7606_CHANNEL(13, 16), + AD7606_CHANNEL(14, 16), + AD7606_CHANNEL(15, 16), +}; + +static int ad7606c_18bit_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch); +static int ad7606c_16bit_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch); +static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch); + +const struct ad7606_chip_info ad7605_4_info =3D { + .channels =3D ad7605_channels, + .name =3D "ad7605-4", + .num_channels =3D 5, + .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7605_4_info, IIO_AD7606); + +const struct ad7606_chip_info ad7606_8_info =3D { + .channels =3D ad7606_channels_16bit, + .name =3D "ad7606-8", + .num_channels =3D 9, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7606_8_info, IIO_AD7606); + +const struct ad7606_chip_info ad7606_6_info =3D { + .channels =3D ad7606_channels_16bit, + .name =3D "ad7606-6", + .num_channels =3D 7, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7606_6_info, IIO_AD7606); + +const struct ad7606_chip_info ad7606_4_info =3D { + .channels =3D ad7606_channels_16bit, + .name =3D "ad7606-4", + .num_channels =3D 5, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7606_4_info, IIO_AD7606); + +const struct ad7606_chip_info ad7606b_info =3D { + .channels =3D ad7606_channels_16bit, + .name =3D "ad7606b", + .num_channels =3D 9, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7606b_info, IIO_AD7606); + +const struct ad7606_chip_info ad7606c_16_info =3D { + .channels =3D ad7606_channels_16bit, + .name =3D "ad7606c16", + .num_channels =3D 9, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7606c_16bit_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7606c_16_info, IIO_AD7606); + +const struct ad7606_chip_info ad7606c_18_info =3D { + .channels =3D ad7606_channels_18bit, + .name =3D "ad7606c18", + .num_channels =3D 9, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7606c_18bit_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7606c_18_info, IIO_AD7606); + +const struct ad7606_chip_info ad7616_info =3D { + .channels =3D ad7616_channels, + .init_delay_ms =3D 15, + .name =3D "ad7616", + .num_channels =3D 17, + .oversampling_avail =3D ad7616_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7616_oversampling_avail), + .os_req_reset =3D true, + .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7616_info, IIO_AD7606); + int ad7606_reset(struct ad7606_state *st) { if (st->gpio_reset) { @@ -622,128 +771,6 @@ static const struct attribute_group ad7606_attribute_= group_range =3D { .attrs =3D ad7606_attributes_range, }; =20 -static const struct iio_chan_spec ad7605_channels[] =3D { - IIO_CHAN_SOFT_TIMESTAMP(4), - AD7605_CHANNEL(0), - AD7605_CHANNEL(1), - AD7605_CHANNEL(2), - AD7605_CHANNEL(3), -}; - -static const struct iio_chan_spec ad7606_channels_16bit[] =3D { - IIO_CHAN_SOFT_TIMESTAMP(8), - AD7606_CHANNEL(0, 16), - AD7606_CHANNEL(1, 16), - AD7606_CHANNEL(2, 16), - AD7606_CHANNEL(3, 16), - AD7606_CHANNEL(4, 16), - AD7606_CHANNEL(5, 16), - AD7606_CHANNEL(6, 16), - AD7606_CHANNEL(7, 16), -}; - -static const struct iio_chan_spec ad7606_channels_18bit[] =3D { - IIO_CHAN_SOFT_TIMESTAMP(8), - AD7606_CHANNEL(0, 18), - AD7606_CHANNEL(1, 18), - AD7606_CHANNEL(2, 18), - AD7606_CHANNEL(3, 18), - AD7606_CHANNEL(4, 18), - AD7606_CHANNEL(5, 18), - AD7606_CHANNEL(6, 18), - AD7606_CHANNEL(7, 18), -}; - -/* - * The current assumption that this driver makes for AD7616, is that it's - * working in Hardware Mode with Serial, Burst and Sequencer modes activat= ed. - * To activate them, following pins must be pulled high: - * -SER/PAR - * -SEQEN - * And following pins must be pulled low: - * -WR/BURST - * -DB4/SER1W - */ -static const struct iio_chan_spec ad7616_channels[] =3D { - IIO_CHAN_SOFT_TIMESTAMP(16), - AD7606_CHANNEL(0, 16), - AD7606_CHANNEL(1, 16), - AD7606_CHANNEL(2, 16), - AD7606_CHANNEL(3, 16), - AD7606_CHANNEL(4, 16), - AD7606_CHANNEL(5, 16), - AD7606_CHANNEL(6, 16), - AD7606_CHANNEL(7, 16), - AD7606_CHANNEL(8, 16), - AD7606_CHANNEL(9, 16), - AD7606_CHANNEL(10, 16), - AD7606_CHANNEL(11, 16), - AD7606_CHANNEL(12, 16), - AD7606_CHANNEL(13, 16), - AD7606_CHANNEL(14, 16), - AD7606_CHANNEL(15, 16), -}; - -static const struct ad7606_chip_info ad7606_chip_info_tbl[] =3D { - /* More devices added in future */ - [ID_AD7605_4] =3D { - .channels =3D ad7605_channels, - .num_channels =3D 5, - .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, - }, - [ID_AD7606_8] =3D { - .channels =3D ad7606_channels_16bit, - .num_channels =3D 9, - .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, - .oversampling_avail =3D ad7606_oversampling_avail, - .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), - }, - [ID_AD7606_6] =3D { - .channels =3D ad7606_channels_16bit, - .num_channels =3D 7, - .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, - .oversampling_avail =3D ad7606_oversampling_avail, - .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), - }, - [ID_AD7606_4] =3D { - .channels =3D ad7606_channels_16bit, - .num_channels =3D 5, - .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, - .oversampling_avail =3D ad7606_oversampling_avail, - .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), - }, - [ID_AD7606B] =3D { - .channels =3D ad7606_channels_16bit, - .num_channels =3D 9, - .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, - .oversampling_avail =3D ad7606_oversampling_avail, - .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), - }, - [ID_AD7606C_16] =3D { - .channels =3D ad7606_channels_16bit, - .num_channels =3D 9, - .scale_setup_cb =3D ad7606c_16bit_chan_scale_setup, - .oversampling_avail =3D ad7606_oversampling_avail, - .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), - }, - [ID_AD7606C_18] =3D { - .channels =3D ad7606_channels_18bit, - .num_channels =3D 9, - .scale_setup_cb =3D ad7606c_18bit_chan_scale_setup, - .oversampling_avail =3D ad7606_oversampling_avail, - .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), - }, - [ID_AD7616] =3D { - .channels =3D ad7616_channels, - .num_channels =3D 17, - .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, - .oversampling_avail =3D ad7616_oversampling_avail, - .oversampling_num =3D ARRAY_SIZE(ad7616_oversampling_avail), - .os_req_reset =3D true, - .init_delay_ms =3D 15, - }, -}; - static int ad7606_request_gpios(struct ad7606_state *st) { struct device *dev =3D st->dev; @@ -922,7 +949,7 @@ static const struct iio_trigger_ops ad7606_trigger_ops = =3D { .validate_device =3D iio_trigger_validate_own_device, }; =20 -static int ad7606_sw_mode_setup(struct iio_dev *indio_dev, unsigned int id) +static int ad7606_sw_mode_setup(struct iio_dev *indio_dev) { struct ad7606_state *st =3D iio_priv(indio_dev); =20 @@ -983,7 +1010,7 @@ static void ad7606_pwm_disable(void *data) } =20 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, - const char *name, unsigned int id, + const struct ad7606_chip_info *chip_info, const struct ad7606_bus_ops *bops) { struct ad7606_state *st; @@ -1008,7 +1035,7 @@ int ad7606_probe(struct device *dev, int irq, void __= iomem *base_address, return dev_err_probe(dev, ret, "Failed to enable specified AVcc supply\n"); =20 - st->chip_info =3D &ad7606_chip_info_tbl[id]; + st->chip_info =3D chip_info; =20 if (st->chip_info->oversampling_num) { st->oversampling_avail =3D st->chip_info->oversampling_avail; @@ -1031,7 +1058,7 @@ int ad7606_probe(struct device *dev, int irq, void __= iomem *base_address, indio_dev->info =3D &ad7606_info_no_os_or_range; } indio_dev->modes =3D INDIO_DIRECT_MODE; - indio_dev->name =3D name; + indio_dev->name =3D chip_info->name; indio_dev->channels =3D st->chip_info->channels; indio_dev->num_channels =3D st->chip_info->num_channels; =20 @@ -1050,7 +1077,7 @@ int ad7606_probe(struct device *dev, int irq, void __= iomem *base_address, st->write_scale =3D ad7606_write_scale_hw; st->write_os =3D ad7606_write_os_hw; =20 - ret =3D ad7606_sw_mode_setup(indio_dev, id); + ret =3D ad7606_sw_mode_setup(indio_dev); if (ret) return ret; =20 @@ -1101,7 +1128,7 @@ int ad7606_probe(struct device *dev, int irq, void __= iomem *base_address, NULL, &ad7606_interrupt, IRQF_TRIGGER_FALLING | IRQF_ONESHOT, - name, indio_dev); + chip_info->name, indio_dev); if (ret) return ret; =20 diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 760cf5e2ecb6..d401d3ab37e0 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -69,6 +69,7 @@ typedef int (*ad7606_scale_setup_cb_t)(struct ad7606_stat= e *st, /** * struct ad7606_chip_info - chip specific information * @channels: channel specification + * @name device name * @num_channels: number of channels * @scale_setup_cb: callback to setup the scales for each channel * @oversampling_avail pointer to the array which stores the available @@ -80,6 +81,7 @@ typedef int (*ad7606_scale_setup_cb_t)(struct ad7606_stat= e *st, */ struct ad7606_chip_info { const struct iio_chan_spec *channels; + const char *name; unsigned int num_channels; ad7606_scale_setup_cb_t scale_setup_cb; const unsigned int *oversampling_avail; @@ -199,22 +201,30 @@ struct ad7606_bus_ops { u16 (*rd_wr_cmd)(int addr, char isWriteOp); }; =20 +/** + * struct ad7606_bus_info - agregate ad7606_chip_info and ad7606_bus_ops + * @chip_info entry in the table of chips that describes this device + * @bops bus operations (SPI or parallel) + */ +struct ad7606_bus_info { + const struct ad7606_chip_info *chip_info; + const struct ad7606_bus_ops *bops; +}; + int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, - const char *name, unsigned int id, + const struct ad7606_chip_info *info, const struct ad7606_bus_ops *bops); =20 int ad7606_reset(struct ad7606_state *st); =20 -enum ad7606_supported_device_ids { - ID_AD7605_4, - ID_AD7606_8, - ID_AD7606_6, - ID_AD7606_4, - ID_AD7606B, - ID_AD7606C_16, - ID_AD7606C_18, - ID_AD7616, -}; +extern const struct ad7606_chip_info ad7605_4_info; +extern const struct ad7606_chip_info ad7606_8_info; +extern const struct ad7606_chip_info ad7606_6_info; +extern const struct ad7606_chip_info ad7606_4_info; +extern const struct ad7606_chip_info ad7606b_info; +extern const struct ad7606_chip_info ad7606c_16_info; +extern const struct ad7606_chip_info ad7606c_18_info; +extern const struct ad7606_chip_info ad7616_info; =20 #ifdef CONFIG_PM_SLEEP extern const struct dev_pm_ops ad7606_pm_ops; diff --git a/drivers/iio/adc/ad7606_par.c b/drivers/iio/adc/ad7606_par.c index d651639c45eb..b87be2f1ca04 100644 --- a/drivers/iio/adc/ad7606_par.c +++ b/drivers/iio/adc/ad7606_par.c @@ -11,6 +11,7 @@ #include #include #include +#include #include =20 #include @@ -89,12 +90,20 @@ static const struct ad7606_bus_ops ad7606_par8_bops =3D= { =20 static int ad7606_par_probe(struct platform_device *pdev) { - const struct platform_device_id *id =3D platform_get_device_id(pdev); + const struct ad7606_chip_info *chip_info; + const struct platform_device_id *id; struct resource *res; void __iomem *addr; resource_size_t remap_size; int irq; =20 + if (dev_fwnode(&pdev->dev)) { + chip_info =3D device_get_match_data(&pdev->dev); + } else { + id =3D platform_get_device_id(pdev); + chip_info =3D (const struct ad7606_chip_info *)id->driver_data; + } + irq =3D platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -105,26 +114,25 @@ static int ad7606_par_probe(struct platform_device *p= dev) =20 remap_size =3D resource_size(res); =20 - return ad7606_probe(&pdev->dev, irq, addr, - id->name, id->driver_data, + return ad7606_probe(&pdev->dev, irq, addr, chip_info, remap_size > 1 ? &ad7606_par16_bops : &ad7606_par8_bops); } =20 static const struct platform_device_id ad7606_driver_ids[] =3D { - { .name =3D "ad7605-4", .driver_data =3D ID_AD7605_4, }, - { .name =3D "ad7606-4", .driver_data =3D ID_AD7606_4, }, - { .name =3D "ad7606-6", .driver_data =3D ID_AD7606_6, }, - { .name =3D "ad7606-8", .driver_data =3D ID_AD7606_8, }, + { .name =3D "ad7605-4", .driver_data =3D (kernel_ulong_t)&ad7605_4_info, = }, + { .name =3D "ad7606-4", .driver_data =3D (kernel_ulong_t)&ad7606_4_info, = }, + { .name =3D "ad7606-6", .driver_data =3D (kernel_ulong_t)&ad7606_6_info, = }, + { .name =3D "ad7606-8", .driver_data =3D (kernel_ulong_t)&ad7606_8_info, = }, { } }; MODULE_DEVICE_TABLE(platform, ad7606_driver_ids); =20 static const struct of_device_id ad7606_of_match[] =3D { - { .compatible =3D "adi,ad7605-4" }, - { .compatible =3D "adi,ad7606-4" }, - { .compatible =3D "adi,ad7606-6" }, - { .compatible =3D "adi,ad7606-8" }, + { .compatible =3D "adi,ad7605-4", .data =3D &ad7605_4_info }, + { .compatible =3D "adi,ad7606-4", .data =3D &ad7606_4_info }, + { .compatible =3D "adi,ad7606-6", .data =3D &ad7606_6_info }, + { .compatible =3D "adi,ad7606-8", .data =3D &ad7606_8_info }, { } }; MODULE_DEVICE_TABLE(of, ad7606_of_match); diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c index d12e55123888..44c6031e9e9a 100644 --- a/drivers/iio/adc/ad7606_spi.c +++ b/drivers/iio/adc/ad7606_spi.c @@ -334,7 +334,7 @@ static const struct ad7606_bus_ops ad7616_spi_bops =3D { .sw_mode_config =3D ad7616_sw_mode_config, }; =20 -static const struct ad7606_bus_ops ad7606B_spi_bops =3D { +static const struct ad7606_bus_ops ad7606b_spi_bops =3D { .read_block =3D ad7606_spi_read_block, .reg_read =3D ad7606_spi_reg_read, .reg_write =3D ad7606_spi_reg_write, @@ -352,54 +352,76 @@ static const struct ad7606_bus_ops ad7606c_18_spi_bop= s =3D { .sw_mode_config =3D ad7606c_18_sw_mode_config, }; =20 +static const struct ad7606_bus_info ad7605_4_bus_info =3D { + .chip_info =3D &ad7605_4_info, + .bops =3D &ad7606_spi_bops, +}; + +static const struct ad7606_bus_info ad7606_8_bus_info =3D { + .chip_info =3D &ad7606_8_info, + .bops =3D &ad7606_spi_bops, +}; + +static const struct ad7606_bus_info ad7606_6_bus_info =3D { + .chip_info =3D &ad7606_6_info, + .bops =3D &ad7606_spi_bops, +}; + +static const struct ad7606_bus_info ad7606_4_bus_info =3D { + .chip_info =3D &ad7606_4_info, + .bops =3D &ad7606_spi_bops, +}; + +static const struct ad7606_bus_info ad7606b_bus_info =3D { + .chip_info =3D &ad7606b_info, + .bops =3D &ad7606b_spi_bops, +}; + +static const struct ad7606_bus_info ad7606c_16_bus_info =3D { + .chip_info =3D &ad7606c_16_info, + .bops =3D &ad7606b_spi_bops, +}; + +static const struct ad7606_bus_info ad7606c_18_bus_info =3D { + .chip_info =3D &ad7606c_18_info, + .bops =3D &ad7606c_18_spi_bops, +}; + +static const struct ad7606_bus_info ad7616_bus_info =3D { + .chip_info =3D &ad7616_info, + .bops =3D &ad7616_spi_bops, +}; + static int ad7606_spi_probe(struct spi_device *spi) { - const struct spi_device_id *id =3D spi_get_device_id(spi); - const struct ad7606_bus_ops *bops; - - switch (id->driver_data) { - case ID_AD7616: - bops =3D &ad7616_spi_bops; - break; - case ID_AD7606B: - case ID_AD7606C_16: - bops =3D &ad7606B_spi_bops; - break; - case ID_AD7606C_18: - bops =3D &ad7606c_18_spi_bops; - break; - default: - bops =3D &ad7606_spi_bops; - break; - } + const struct ad7606_bus_info *bus_info =3D spi_get_device_match_data(spi); =20 return ad7606_probe(&spi->dev, spi->irq, NULL, - id->name, id->driver_data, - bops); + bus_info->chip_info, bus_info->bops); } =20 static const struct spi_device_id ad7606_id_table[] =3D { - { "ad7605-4", ID_AD7605_4 }, - { "ad7606-4", ID_AD7606_4 }, - { "ad7606-6", ID_AD7606_6 }, - { "ad7606-8", ID_AD7606_8 }, - { "ad7606b", ID_AD7606B }, - { "ad7606c-16", ID_AD7606C_16 }, - { "ad7606c-18", ID_AD7606C_18 }, - { "ad7616", ID_AD7616 }, + { "ad7605-4", (kernel_ulong_t)&ad7605_4_bus_info }, + { "ad7606-4", (kernel_ulong_t)&ad7606_4_bus_info }, + { "ad7606-6", (kernel_ulong_t)&ad7606_6_bus_info }, + { "ad7606-8", (kernel_ulong_t)&ad7606_8_bus_info }, + { "ad7606b", (kernel_ulong_t)&ad7606b_bus_info }, + { "ad7606c-16", (kernel_ulong_t)&ad7606c_16_bus_info }, + { "ad7606c-18", (kernel_ulong_t)&ad7606c_18_bus_info }, + { "ad7616", (kernel_ulong_t)&ad7616_bus_info }, { } }; MODULE_DEVICE_TABLE(spi, ad7606_id_table); =20 static const struct of_device_id ad7606_of_match[] =3D { - { .compatible =3D "adi,ad7605-4" }, - { .compatible =3D "adi,ad7606-4" }, - { .compatible =3D "adi,ad7606-6" }, - { .compatible =3D "adi,ad7606-8" }, - { .compatible =3D "adi,ad7606b" }, - { .compatible =3D "adi,ad7606c-16" }, - { .compatible =3D "adi,ad7606c-18" }, - { .compatible =3D "adi,ad7616" }, + { .compatible =3D "adi,ad7605-4", .data =3D &ad7605_4_bus_info }, + { .compatible =3D "adi,ad7606-4", .data =3D &ad7606_4_bus_info }, + { .compatible =3D "adi,ad7606-6", .data =3D &ad7606_6_bus_info }, + { .compatible =3D "adi,ad7606-8", .data =3D &ad7606_8_bus_info }, + { .compatible =3D "adi,ad7606b", .data =3D &ad7606b_bus_info }, + { .compatible =3D "adi,ad7606c-16", .data =3D &ad7606c_16_bus_info }, + { .compatible =3D "adi,ad7606c-18", .data =3D &ad7606c_18_bus_info }, + { .compatible =3D "adi,ad7616", .data =3D &ad7616_bus_info }, { } }; MODULE_DEVICE_TABLE(of, ad7606_of_match); --=20 2.34.1