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charset="utf-8" From: Eugene Lepshy A642L (speedbin 0x81) uses index 4, so this commit sets the fourth bit for A642L supported opps. Signed-off-by: Eugene Lepshy Signed-off-by: Danila Tikhonov Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index b41230651def..7c75340b3a46 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2841,14 +2841,14 @@ opp-315000000 { opp-hz =3D /bits/ 64 <315000000>; opp-level =3D ; opp-peak-kBps =3D <1804000>; - opp-supported-hw =3D <0x07>; + opp-supported-hw =3D <0x17>; }; =20 opp-450000000 { opp-hz =3D /bits/ 64 <450000000>; opp-level =3D ; opp-peak-kBps =3D <4068000>; - opp-supported-hw =3D <0x07>; + opp-supported-hw =3D <0x17>; }; =20 /* Only applicable for SKUs which has 550Mhz as Fmax */ @@ -2863,14 +2863,14 @@ opp-550000000-1 { opp-hz =3D /bits/ 64 <550000000>; opp-level =3D ; opp-peak-kBps =3D <6832000>; - opp-supported-hw =3D <0x06>; + opp-supported-hw =3D <0x16>; }; =20 opp-608000000 { opp-hz =3D /bits/ 64 <608000000>; opp-level =3D ; opp-peak-kBps =3D <8368000>; - opp-supported-hw =3D <0x06>; + opp-supported-hw =3D <0x16>; }; =20 opp-700000000 { --=20 2.47.0