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charset="utf-8" From: Haibo Chen Export the sdhci_enable_irq_wakeups() and sdhci_disable_irq_wakeups, so other driver can use them. Signed-off-by: Haibo Chen --- drivers/mmc/host/sdhci.c | 6 ++++-- drivers/mmc/host/sdhci.h | 2 ++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 4b91c9e96635..b3df3e7653af 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3698,7 +3698,7 @@ static bool sdhci_cd_irq_can_wakeup(struct sdhci_host= *host) * sdhci_disable_irq_wakeups() since it will be set by * sdhci_enable_card_detection() or sdhci_init(). */ -static bool sdhci_enable_irq_wakeups(struct sdhci_host *host) +bool sdhci_enable_irq_wakeups(struct sdhci_host *host) { u8 mask =3D SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE | SDHCI_WAKE_ON_INT; @@ -3730,8 +3730,9 @@ static bool sdhci_enable_irq_wakeups(struct sdhci_hos= t *host) =20 return host->irq_wake_enabled; } +EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups); =20 -static void sdhci_disable_irq_wakeups(struct sdhci_host *host) +void sdhci_disable_irq_wakeups(struct sdhci_host *host) { u8 val; u8 mask =3D SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE @@ -3745,6 +3746,7 @@ static void sdhci_disable_irq_wakeups(struct sdhci_ho= st *host) =20 host->irq_wake_enabled =3D false; } +EXPORT_SYMBOL_GPL(sdhci_disable_irq_wakeups); =20 int sdhci_suspend_host(struct sdhci_host *host) { diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index f531b617f28d..bc303fe7f87b 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -802,6 +802,8 @@ void sdhci_adma_write_desc(struct sdhci_host *host, voi= d **desc, dma_addr_t addr, int len, unsigned int cmd); =20 #ifdef CONFIG_PM +bool sdhci_enable_irq_wakeups(struct sdhci_host *host); +void sdhci_disable_irq_wakeups(struct sdhci_host *host); int sdhci_suspend_host(struct sdhci_host *host); int sdhci_resume_host(struct sdhci_host *host); int sdhci_runtime_suspend_host(struct sdhci_host *host); --=20 2.34.1 From nobody Wed Nov 27 04:38:32 2024 Received: from EUR03-VI1-obe.outbound.protection.outlook.com (mail-vi1eur03on2084.outbound.protection.outlook.com [40.107.103.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4D3513D62B; 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charset="utf-8" From: Haibo Chen Current suspend/resume logic has one issue. in suspend, will config register when call sdhci_suspend_host(), but at this time, can't guarantee host in runtime resume state. if not, the per clock is gate off, access register will hung. Now use pm_runtime_force_suspend/resume() in NOIRQ_SYSTEM_SLEEP_PM, add in NOIRQ stage can cover SDIO wakeup feature, because in interrupt handler, there is register access, need the per clock on. In sdhci_esdhc_suspend/sdhci_esdhc_resume, remove sdhci_suspend_host() and sdhci_resume_host(), all are handled in runtime PM callbacks except the wakeup irq setting. Remove pinctrl_pm_select_default_state() in sdhci_esdhc_resume, because pm_runtime_force_resume() already config the pinctrl state according to ios timing, and here config the default pinctrl state again is wrong for SDIO3.0 device if it keep power in suspend. Signed-off-by: Haibo Chen --- drivers/mmc/host/sdhci-esdhc-imx.c | 39 +++++++++++++++--------------- 1 file changed, 19 insertions(+), 20 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-es= dhc-imx.c index c7582ad45123..18febfeb60cf 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1871,11 +1871,13 @@ static int sdhci_esdhc_suspend(struct device *dev) struct pltfm_imx_data *imx_data =3D sdhci_pltfm_priv(pltfm_host); int ret; =20 - if (host->mmc->caps2 & MMC_CAP2_CQE) { - ret =3D cqhci_suspend(host->mmc); - if (ret) - return ret; - } + /* + * Switch to runtime resume for two reasons: + * 1, there is register access, so need to make sure gate on ipg clock. + * 2, make sure the pm_runtime_force_suspend() in NOIRQ stage really + * invoke its ->runtime_suspend callback. + */ + pm_runtime_get_sync(dev); =20 if ((imx_data->socdata->flags & ESDHC_FLAG_STATE_LOST_IN_LPMODE) && (host->tuning_mode !=3D SDHCI_TUNING_MODE_1)) { @@ -1883,12 +1885,11 @@ static int sdhci_esdhc_suspend(struct device *dev) mmc_retune_needed(host->mmc); } =20 - if (host->tuning_mode !=3D SDHCI_TUNING_MODE_3) - mmc_retune_needed(host->mmc); - - ret =3D sdhci_suspend_host(host); - if (ret) - return ret; + if (device_may_wakeup(dev)) { + ret =3D sdhci_enable_irq_wakeups(host); + if (!ret) + dev_warn(dev, "Failed to enable irq wakeup\n"); + } =20 ret =3D pinctrl_pm_select_sleep_state(dev); if (ret) @@ -1904,22 +1905,18 @@ static int sdhci_esdhc_resume(struct device *dev) struct sdhci_host *host =3D dev_get_drvdata(dev); int ret; =20 - ret =3D pinctrl_pm_select_default_state(dev); + ret =3D mmc_gpio_set_cd_wake(host->mmc, false); if (ret) return ret; =20 /* re-initialize hw state in case it's lost in low power mode */ sdhci_esdhc_imx_hwinit(host); =20 - ret =3D sdhci_resume_host(host); - if (ret) - return ret; - - if (host->mmc->caps2 & MMC_CAP2_CQE) - ret =3D cqhci_resume(host->mmc); + if (host->irq_wake_enabled) + sdhci_disable_irq_wakeups(host); =20 - if (!ret) - ret =3D mmc_gpio_set_cd_wake(host->mmc, false); + pm_runtime_mark_last_busy(dev); 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charset="utf-8" From: Haibo Chen For some SoCs like imx6ul(l/z)/imx7d/imx93, during system PM, usdhc will totally power off, so the internal tuning status will lost. Here add save/restore the tuning value for any command after system resume back when re-tuning hold. The tipical case is for the SDIO which contain flag MMC_PM_KEEP_POWER, and contain pm_flags MMC_PM_WAKE_SDIO_IRQ. in mmc_sdio_suspend(), SDIO will switch to 1 bit mode, and switch back to 4 bit mode when resume back. According to spec, tuning command do not support in 1 bit mode. So when send cmd52 to switch back to 4 bit mode, need to hold re-tuning. But this cmd52 still need a correct sample point, otherwise will meet command CRC error, so need to keep the previous tuning value. Signed-off-by: Haibo Chen --- drivers/mmc/host/sdhci-esdhc-imx.c | 94 +++++++++++++++++++++++++++++- 1 file changed, 91 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-es= dhc-imx.c index 18febfeb60cf..4173967022d0 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -80,6 +80,9 @@ #define ESDHC_TUNE_CTRL_STEP 1 #define ESDHC_TUNE_CTRL_MIN 0 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1) +#define ESDHC_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK 0x7f000000 +#define ESDHC_TUNE_CTRL_STATUS_TAP_SEL_PRE_SHIFT 24 +#define ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT 8 =20 /* strobe dll register */ #define ESDHC_STROBE_DLL_CTRL 0x70 @@ -234,6 +237,7 @@ struct esdhc_platform_data { unsigned int tuning_step; /* The delay cell steps in tuning procedu= re */ unsigned int tuning_start_tap; /* The start delay cell point in tuning pr= ocedure */ unsigned int strobe_dll_delay_target; /* The delay cell for strobe pad (r= ead clock) */ + unsigned int saved_tuning_delay_cell; /* save the value of tuning delay c= ell */ }; =20 struct esdhc_soc_data { @@ -1055,7 +1059,7 @@ static void esdhc_reset_tuning(struct sdhci_host *hos= t) { struct sdhci_pltfm_host *pltfm_host =3D sdhci_priv(host); struct pltfm_imx_data *imx_data =3D sdhci_pltfm_priv(pltfm_host); - u32 ctrl; + u32 ctrl, tuning_ctrl; int ret; =20 /* Reset the tuning circuit */ @@ -1069,6 +1073,17 @@ static void esdhc_reset_tuning(struct sdhci_host *ho= st) writel(0, host->ioaddr + ESDHC_TUNE_CTRL_STATUS); } else if (imx_data->socdata->flags & ESDHC_FLAG_STD_TUNING) { writel(ctrl, host->ioaddr + ESDHC_MIX_CTRL); + + /* + * enable the std tuning just in case it cleared in + * sdhc_esdhc_tuning_restore. + */ + tuning_ctrl =3D readl(host->ioaddr + ESDHC_TUNING_CTRL); + if (!(tuning_ctrl & ESDHC_STD_TUNING_EN)) { + tuning_ctrl |=3D ESDHC_STD_TUNING_EN; + writel(tuning_ctrl, host->ioaddr + ESDHC_TUNING_CTRL); + } + ctrl =3D readl(host->ioaddr + SDHCI_AUTO_CMD_STATUS); ctrl &=3D ~ESDHC_MIX_CTRL_SMPCLK_SEL; ctrl &=3D ~ESDHC_MIX_CTRL_EXE_TUNE; @@ -1147,7 +1162,8 @@ static void esdhc_prepare_tuning(struct sdhci_host *h= ost, u32 val) reg |=3D ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL | ESDHC_MIX_CTRL_FBCLK_SEL; writel(reg, host->ioaddr + ESDHC_MIX_CTRL); - writel(val << 8, host->ioaddr + ESDHC_TUNE_CTRL_STATUS); + writel(val << ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT, + host->ioaddr + ESDHC_TUNE_CTRL_STATUS); dev_dbg(mmc_dev(host->mmc), "tuning with delay 0x%x ESDHC_TUNE_CTRL_STATUS 0x%x\n", val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS)); @@ -1555,6 +1571,58 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host= *host) } } =20 +static void sdhc_esdhc_tuning_save(struct sdhci_host *host) +{ + struct sdhci_pltfm_host *pltfm_host =3D sdhci_priv(host); + struct pltfm_imx_data *imx_data =3D sdhci_pltfm_priv(pltfm_host); + u32 reg; + + /* + * SD/eMMC do not need this tuning save because it will re-init + * after system resume back. + * Here save the tuning delay value for SDIO device since it may + * keep power during system PM. And for usdhc, only SDR50 and + * SDR104 mode for SDIO devide need to do tuning, and need to + * save/restore. + */ + if ((host->timing =3D=3D MMC_TIMING_UHS_SDR50) | + (host->timing =3D=3D MMC_TIMING_UHS_SDR104)) { + reg =3D readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS); + reg =3D (reg & ESDHC_TUNE_CTRL_STATUS_TAP_SEL_PRE_MASK) >> + ESDHC_TUNE_CTRL_STATUS_TAP_SEL_PRE_SHIFT; + imx_data->boarddata.saved_tuning_delay_cell =3D reg; + } +} + +static void sdhc_esdhc_tuning_restore(struct sdhci_host *host) +{ + struct sdhci_pltfm_host *pltfm_host =3D sdhci_priv(host); + struct pltfm_imx_data *imx_data =3D sdhci_pltfm_priv(pltfm_host); + u32 reg; + + if ((host->timing =3D=3D MMC_TIMING_UHS_SDR50) | + (host->timing =3D=3D MMC_TIMING_UHS_SDR104)) { + /* + * restore the tuning delay value actually is a + * manual tuning method, so clear the standard + * tuning enable bit here. Will set back this + * ESDHC_STD_TUNING_EN in esdhc_reset_tuning() + * when trigger re-tuning. + */ + reg =3D readl(host->ioaddr + ESDHC_TUNING_CTRL); + reg &=3D ~ESDHC_STD_TUNING_EN; + writel(reg, host->ioaddr + ESDHC_TUNING_CTRL); + + reg =3D readl(host->ioaddr + ESDHC_MIX_CTRL); + reg |=3D ESDHC_MIX_CTRL_SMPCLK_SEL | ESDHC_MIX_CTRL_FBCLK_SEL; + writel(reg, host->ioaddr + ESDHC_MIX_CTRL); + + writel(imx_data->boarddata.saved_tuning_delay_cell << + ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_SHIFT, + host->ioaddr + ESDHC_TUNE_CTRL_STATUS); + } +} + static void esdhc_cqe_enable(struct mmc_host *mmc) { struct sdhci_host *host =3D mmc_priv(mmc); @@ -1883,7 +1951,17 @@ static int sdhci_esdhc_suspend(struct device *dev) (host->tuning_mode !=3D SDHCI_TUNING_MODE_1)) { mmc_retune_timer_stop(host->mmc); mmc_retune_needed(host->mmc); - } + + /* + * For the SDIO device need to keep power during system PM, and enable + * wakeup, need to save the tuning delay value just in case the retuning + * is hold when SDIO resume, but still need to switch to 4 bit bus width. + */ + if (host->mmc->sdio_irqs && mmc_card_keep_power(host->mmc) && + (esdhc_is_usdhc(imx_data))) + sdhc_esdhc_tuning_save(host); + + } =20 if (device_may_wakeup(dev)) { ret =3D sdhci_enable_irq_wakeups(host); @@ -1903,6 +1981,8 @@ static int sdhci_esdhc_suspend(struct device *dev) static int sdhci_esdhc_resume(struct device *dev) { struct sdhci_host *host =3D dev_get_drvdata(dev); + struct sdhci_pltfm_host *pltfm_host =3D sdhci_priv(host); + struct pltfm_imx_data *imx_data =3D sdhci_pltfm_priv(pltfm_host); int ret; =20 ret =3D mmc_gpio_set_cd_wake(host->mmc, false); @@ -1915,6 +1995,14 @@ static int sdhci_esdhc_resume(struct device *dev) if (host->irq_wake_enabled) sdhci_disable_irq_wakeups(host); =20 + /* + * Restore the saved tuning delay value for the SDIO device + * which enabled wakeup and keep power during system PM. + */ + if ((imx_data->socdata->flags & ESDHC_FLAG_STATE_LOST_IN_LPMODE) && + mmc_card_keep_power(host->mmc) && mmc_card_wake_sdio_irq(host->mmc)) + sdhc_esdhc_tuning_restore(host); + pm_runtime_mark_last_busy(dev); pm_runtime_put_autosuspend(dev); =20 --=20 2.34.1 From nobody Wed Nov 27 04:38:32 2024 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2048.outbound.protection.outlook.com [40.107.22.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF9F713EFF3; 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Received: from DU0PR04MB9496.eurprd04.prod.outlook.com (2603:10a6:10:32d::19) by PAXPR04MB8224.eurprd04.prod.outlook.com (2603:10a6:102:1cb::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.26; Mon, 14 Oct 2024 06:00:40 +0000 Received: from DU0PR04MB9496.eurprd04.prod.outlook.com ([fe80::4fa3:7420:14ed:5334]) by DU0PR04MB9496.eurprd04.prod.outlook.com ([fe80::4fa3:7420:14ed:5334%7]) with mapi id 15.20.8048.020; Mon, 14 Oct 2024 06:00:40 +0000 From: haibo.chen@nxp.com To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: imx@lists.linux.dev, haibo.chen@nxp.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, s32@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] mmc: sdhci-esdhc-imx: do not change to sleep pinctrl state in suspend if enable wakeup Date: Mon, 14 Oct 2024 14:01:30 +0800 Message-Id: <20241014060130.1162629-5-haibo.chen@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241014060130.1162629-1-haibo.chen@nxp.com> References: <20241014060130.1162629-1-haibo.chen@nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SI2PR06CA0011.apcprd06.prod.outlook.com (2603:1096:4:186::16) To DU0PR04MB9496.eurprd04.prod.outlook.com (2603:10a6:10:32d::19) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR04MB9496:EE_|PAXPR04MB8224:EE_ X-MS-Office365-Filtering-Correlation-Id: 9c41fabc-9305-4897-0918-08dcec158834 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|7416014|376014|52116014|38350700014; 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charset="utf-8" From: Haibo Chen pinctrl sleep state may config the pin mux to certain function to save power in system PM. But if usdhc is setting as wakeup source, like the card interrupt(SDIO) or card insert interrupt, it depends on the related pin mux configured to usdhc function pad. e.g. To support card interrupt(SDIO interrupt), it need the pin is configured as usdhc DATA[1] function pin. Find the issue on imx93-11x11-evk board, SDIO WiFi in band interrupt can't wakeup system because the pinctrl sleep state config the DATA[1] pin as GPIO function. Signed-off-by: Haibo Chen --- drivers/mmc/host/sdhci-esdhc-imx.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-es= dhc-imx.c index 4173967022d0..d4bb23c9e866 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1969,9 +1969,19 @@ static int sdhci_esdhc_suspend(struct device *dev) dev_warn(dev, "Failed to enable irq wakeup\n"); } =20 - ret =3D pinctrl_pm_select_sleep_state(dev); - if (ret) - return ret; + /* + * For the device which works as wakeup source, no need + * to change the pinctrl to sleep state. + * e.g. For SDIO device, the interrupt share with data pin, + * but the pinctrl sleep state may config the data pin to + * other function like GPIO function to save power in PM, + * which finally block the SDIO wakeup function. + */ + if (!device_may_wakeup(dev) || !host->irq_wake_enabled) { + ret =3D pinctrl_pm_select_sleep_state(dev); + if (ret) + return ret; + } =20 ret =3D mmc_gpio_set_cd_wake(host->mmc, true); =20 --=20 2.34.1