From nobody Wed Nov 27 04:38:48 2024 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 912451A7266 for ; Mon, 14 Oct 2024 03:59:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728878342; cv=none; b=A89M0kbZQRHW0gqdZX/b0UMTTVPOfrxF6wFDwUVONTwgfd0xlaTLaD2yLQ4gXCDD+g1e6qLgr4SheuGE3lqpc/zMdHJPFPdk4NtL+WySEpS1b7h+WeQsNJbFyWZkHvJzo4af+5aonXGd/9/F08LfJj7/h1vVpqiqRsurUdlefX8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728878342; c=relaxed/simple; bh=Uz22pvppNrgRGGFi4CJEfpDa2gLwiWTmyosHm+4yzXY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NjxhIvvw6gDJk/1SqYJvda9Lg+RIJwz9LnLMyK57ninJ87DG5K3em29B3/FUl742U7oTSQJNCo4RVDfkujYNuxun8yx4gexv7521PCBq1v+6yHlY8NgSkUgoXYVlgAFXYoH6aXBq7g/0moYMnSxHGHV2XSs+w9h7Ux5DIZklkV4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxWbEClwxnmAIaAA--.37678S3; Mon, 14 Oct 2024 11:58:58 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxXuT_lgxnc6EoAA--.1717S3; Mon, 14 Oct 2024 11:58:56 +0800 (CST) From: Bibo Mao To: Huacai Chen , Andrey Ryabinin , Andrew Morton Cc: David Hildenbrand , Barry Song , loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org Subject: [PATCH v2 1/3] LoongArch: Set initial pte entry with PAGE_GLOBAL for kernel space Date: Mon, 14 Oct 2024 11:58:53 +0800 Message-Id: <20241014035855.1119220-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20241014035855.1119220-1-maobibo@loongson.cn> References: <20241014035855.1119220-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxXuT_lgxnc6EoAA--.1717S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Unlike general architectures, there are two pages in one TLB entry on LoongArch system. For kernel space, it requires both two pte entries with PAGE_GLOBAL bit set, else HW treats it as non-global tlb, there will be potential problems if tlb entry for kernel space is not global. Such as fail to flush kernel tlb with function local_flush_tlb_kernel_range() which only flush tlb with global bit. With function kernel_pte_init() added, it can be used to init pte table when it is created for kernel address space, and the default initial pte value is PAGE_GLOBAL rather than zero at beginning. Kernel address space areas includes fixmap, percpu, vmalloc, kasan and vmemmap areas set default pte entry with PAGE_GLOBAL set. Signed-off-by: Bibo Mao --- arch/loongarch/include/asm/pgalloc.h | 13 +++++++++++++ arch/loongarch/include/asm/pgtable.h | 1 + arch/loongarch/mm/init.c | 4 +++- arch/loongarch/mm/kasan_init.c | 4 +++- arch/loongarch/mm/pgtable.c | 22 ++++++++++++++++++++++ include/linux/mm.h | 1 + mm/kasan/init.c | 8 +++++++- mm/sparse-vmemmap.c | 5 +++++ 8 files changed, 55 insertions(+), 3 deletions(-) diff --git a/arch/loongarch/include/asm/pgalloc.h b/arch/loongarch/include/= asm/pgalloc.h index 4e2d6b7ca2ee..b2698c03dc2c 100644 --- a/arch/loongarch/include/asm/pgalloc.h +++ b/arch/loongarch/include/asm/pgalloc.h @@ -10,8 +10,21 @@ =20 #define __HAVE_ARCH_PMD_ALLOC_ONE #define __HAVE_ARCH_PUD_ALLOC_ONE +#define __HAVE_ARCH_PTE_ALLOC_ONE_KERNEL #include =20 +static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm) +{ + pte_t *pte; + + pte =3D (pte_t *) __get_free_page(GFP_KERNEL); + if (!pte) + return NULL; + + kernel_pte_init(pte); + return pte; +} + static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte) { diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/include/= asm/pgtable.h index 9965f52ef65b..22e3a8f96213 100644 --- a/arch/loongarch/include/asm/pgtable.h +++ b/arch/loongarch/include/asm/pgtable.h @@ -269,6 +269,7 @@ extern void set_pmd_at(struct mm_struct *mm, unsigned l= ong addr, pmd_t *pmdp, pm extern void pgd_init(void *addr); extern void pud_init(void *addr); extern void pmd_init(void *addr); +extern void kernel_pte_init(void *addr); =20 /* * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that diff --git a/arch/loongarch/mm/init.c b/arch/loongarch/mm/init.c index 8a87a482c8f4..9f26e933a8a3 100644 --- a/arch/loongarch/mm/init.c +++ b/arch/loongarch/mm/init.c @@ -198,9 +198,11 @@ pte_t * __init populate_kernel_pte(unsigned long addr) if (!pmd_present(pmdp_get(pmd))) { pte_t *pte; =20 - pte =3D memblock_alloc(PAGE_SIZE, PAGE_SIZE); + pte =3D memblock_alloc_raw(PAGE_SIZE, PAGE_SIZE); if (!pte) panic("%s: Failed to allocate memory\n", __func__); + + kernel_pte_init(pte); pmd_populate_kernel(&init_mm, pmd, pte); } =20 diff --git a/arch/loongarch/mm/kasan_init.c b/arch/loongarch/mm/kasan_init.c index 427d6b1aec09..34988573b0d5 100644 --- a/arch/loongarch/mm/kasan_init.c +++ b/arch/loongarch/mm/kasan_init.c @@ -152,6 +152,8 @@ static void __init kasan_pte_populate(pmd_t *pmdp, unsi= gned long addr, phys_addr_t page_phys =3D early ? __pa_symbol(kasan_early_shadow_page) : kasan_alloc_zeroed_page(node); + if (!early) + kernel_pte_init(__va(page_phys)); next =3D addr + PAGE_SIZE; set_pte(ptep, pfn_pte(__phys_to_pfn(page_phys), PAGE_KERNEL)); } while (ptep++, addr =3D next, addr !=3D end && __pte_none(early, ptep_g= et(ptep))); @@ -287,7 +289,7 @@ void __init kasan_init(void) set_pte(&kasan_early_shadow_pte[i], pfn_pte(__phys_to_pfn(__pa_symbol(kasan_early_shadow_page)), PAGE_KERNE= L_RO)); =20 - memset(kasan_early_shadow_page, 0, PAGE_SIZE); + kernel_pte_init(kasan_early_shadow_page); csr_write64(__pa_symbol(swapper_pg_dir), LOONGARCH_CSR_PGDH); local_flush_tlb_all(); =20 diff --git a/arch/loongarch/mm/pgtable.c b/arch/loongarch/mm/pgtable.c index eb6a29b491a7..228ffc1db0a3 100644 --- a/arch/loongarch/mm/pgtable.c +++ b/arch/loongarch/mm/pgtable.c @@ -38,6 +38,28 @@ pgd_t *pgd_alloc(struct mm_struct *mm) } EXPORT_SYMBOL_GPL(pgd_alloc); =20 +void kernel_pte_init(void *addr) +{ + unsigned long *p, *end; + unsigned long entry; + + entry =3D (unsigned long)_PAGE_GLOBAL; + p =3D (unsigned long *)addr; + end =3D p + PTRS_PER_PTE; + + do { + p[0] =3D entry; + p[1] =3D entry; + p[2] =3D entry; + p[3] =3D entry; + p[4] =3D entry; + p +=3D 8; + p[-3] =3D entry; + p[-2] =3D entry; + p[-1] =3D entry; + } while (p !=3D end); +} + void pgd_init(void *addr) { unsigned long *p, *end; diff --git a/include/linux/mm.h b/include/linux/mm.h index ecf63d2b0582..6909fe059a2c 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -3818,6 +3818,7 @@ void *sparse_buffer_alloc(unsigned long size); struct page * __populate_section_memmap(unsigned long pfn, unsigned long nr_pages, int nid, struct vmem_altmap *altmap, struct dev_pagemap *pgmap); +void kernel_pte_init(void *addr); void pmd_init(void *addr); void pud_init(void *addr); pgd_t *vmemmap_pgd_populate(unsigned long addr, int node); diff --git a/mm/kasan/init.c b/mm/kasan/init.c index 89895f38f722..ac607c306292 100644 --- a/mm/kasan/init.c +++ b/mm/kasan/init.c @@ -106,6 +106,10 @@ static void __ref zero_pte_populate(pmd_t *pmd, unsign= ed long addr, } } =20 +void __weak __meminit kernel_pte_init(void *addr) +{ +} + static int __ref zero_pmd_populate(pud_t *pud, unsigned long addr, unsigned long end) { @@ -126,8 +130,10 @@ static int __ref zero_pmd_populate(pud_t *pud, unsigne= d long addr, =20 if (slab_is_available()) p =3D pte_alloc_one_kernel(&init_mm); - else + else { p =3D early_alloc(PAGE_SIZE, NUMA_NO_NODE); + kernel_pte_init(p); + } if (!p) return -ENOMEM; =20 diff --git a/mm/sparse-vmemmap.c b/mm/sparse-vmemmap.c index edcc7a6b0f6f..c0388b2e959d 100644 --- a/mm/sparse-vmemmap.c +++ b/mm/sparse-vmemmap.c @@ -184,6 +184,10 @@ static void * __meminit vmemmap_alloc_block_zero(unsig= ned long size, int node) return p; } =20 +void __weak __meminit kernel_pte_init(void *addr) +{ +} + pmd_t * __meminit vmemmap_pmd_populate(pud_t *pud, unsigned long addr, int= node) { pmd_t *pmd =3D pmd_offset(pud, addr); @@ -191,6 +195,7 @@ pmd_t * __meminit vmemmap_pmd_populate(pud_t *pud, unsi= gned long addr, int node) void *p =3D vmemmap_alloc_block_zero(PAGE_SIZE, node); if (!p) return NULL; + kernel_pte_init(p); pmd_populate_kernel(&init_mm, pmd, p); } return pmd; --=20 2.39.3 From nobody Wed Nov 27 04:38:48 2024 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4EA1B142624 for ; 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dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxK_ABlwxnjAIaAA--.39014S3; Mon, 14 Oct 2024 11:58:57 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxXuT_lgxnc6EoAA--.1717S4; Mon, 14 Oct 2024 11:58:57 +0800 (CST) From: Bibo Mao To: Huacai Chen , Andrey Ryabinin , Andrew Morton Cc: David Hildenbrand , Barry Song , loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org Subject: [PATCH v2 2/3] LoongArch: Add barrier between set_pte and memory access Date: Mon, 14 Oct 2024 11:58:54 +0800 Message-Id: <20241014035855.1119220-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20241014035855.1119220-1-maobibo@loongson.cn> References: <20241014035855.1119220-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxXuT_lgxnc6EoAA--.1717S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" It is possible to return a spurious fault if memory is accessed right after the pte is set. For user address space, pte is set in kernel space and memory is accessed in user space, there is long time for synchronization, no barrier needed. However for kernel address space, it is possible that memory is accessed right after the pte is set. Here flush_cache_vmap/flush_cache_vmap_early is used for synchronization. Signed-off-by: Bibo Mao --- arch/loongarch/include/asm/cacheflush.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/loongarch/include/asm/cacheflush.h b/arch/loongarch/inclu= de/asm/cacheflush.h index f8754d08a31a..53be231319ef 100644 --- a/arch/loongarch/include/asm/cacheflush.h +++ b/arch/loongarch/include/asm/cacheflush.h @@ -42,12 +42,24 @@ void local_flush_icache_range(unsigned long start, unsi= gned long end); #define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) #define flush_cache_vunmap(start, end) do { } while (0) #define flush_icache_user_page(vma, page, addr, len) do { } while (0) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) =20 +/* + * It is possible for a kernel virtual mapping access to return a spurious + * fault if it's accessed right after the pte is set. The page fault handl= er + * does not expect this type of fault. flush_cache_vmap is not exactly the + * right place to put this, but it seems to work well enough. + */ +static inline void flush_cache_vmap(unsigned long start, unsigned long end) +{ + smp_mb(); +} +#define flush_cache_vmap flush_cache_vmap +#define flush_cache_vmap_early flush_cache_vmap + #define cache_op(op, addr) \ __asm__ __volatile__( \ " cacop %0, %1 \n" \ --=20 2.39.3 From nobody Wed Nov 27 04:38:48 2024 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A10061A7259 for ; Mon, 14 Oct 2024 03:58:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728878342; cv=none; b=ou22oUGKxwcOp2WkGri8xm5prn6phA5tScLNtKKmaXuN4xM2BtiybMBYJvAbm1v0z1jHtZ8wL2sCbBpvISvC+95WK7ZYnglwo5mtrloKfc1JyZc2yblkkpIEqKG5/pAXy+jkdP29p98gcvkcdx/9BralwI5gcAmRTzyhoiOpSbM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728878342; c=relaxed/simple; bh=ptzeV/KUkyoX894HxvO+FYV/s0m195mvVeaeLYKJ5W4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=EUEGQvY6g9E9U7JP0DtijoucVhVOp66pfY5oQdh0hLE6MkyKTnVS5+lnUp8UG0+c6tPfgOEYydf1F7S69B8KTflNbVXCp7OZK3gz/2weqSsBze/bbVUYh+DJDILrXaxUCczMfhdyL1tHLw6uPy+/Glxm5DEIx0BTPbXe+i8/0mg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxhokClwxnkgIaAA--.37545S3; Mon, 14 Oct 2024 11:58:58 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxXuT_lgxnc6EoAA--.1717S5; Mon, 14 Oct 2024 11:58:57 +0800 (CST) From: Bibo Mao To: Huacai Chen , Andrey Ryabinin , Andrew Morton Cc: David Hildenbrand , Barry Song , loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org Subject: [PATCH v2 3/3] LoongArch: Remove pte buddy set with set_pte and pte_clear function Date: Mon, 14 Oct 2024 11:58:55 +0800 Message-Id: <20241014035855.1119220-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20241014035855.1119220-1-maobibo@loongson.cn> References: <20241014035855.1119220-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxXuT_lgxnc6EoAA--.1717S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" For kernel address space area on LoongArch system, both two consecutive page table entries should be enabled with PAGE_GLOBAL bit. So with function set_pte() and pte_clear(), pte buddy entry is checked and set besides its own pte entry. However it is not atomic operation to set both two pte entries, there is problem with test_vmalloc test case. With previous patch, all page table entries are set with PAGE_GLOBAL bit at beginning. Only its own pte entry need update with function set_pte() and pte_clear(), nothing to do with pte buddy entry. Signed-off-by: Bibo Mao --- arch/loongarch/include/asm/pgtable.h | 35 ++++------------------------ 1 file changed, 5 insertions(+), 30 deletions(-) diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/include/= asm/pgtable.h index 22e3a8f96213..bc29c95b1710 100644 --- a/arch/loongarch/include/asm/pgtable.h +++ b/arch/loongarch/include/asm/pgtable.h @@ -325,40 +325,15 @@ extern void paging_init(void); static inline void set_pte(pte_t *ptep, pte_t pteval) { WRITE_ONCE(*ptep, pteval); - - if (pte_val(pteval) & _PAGE_GLOBAL) { - pte_t *buddy =3D ptep_buddy(ptep); - /* - * Make sure the buddy is global too (if it's !none, - * it better already be global) - */ - if (pte_none(ptep_get(buddy))) { -#ifdef CONFIG_SMP - /* - * For SMP, multiple CPUs can race, so we need - * to do this atomically. - */ - __asm__ __volatile__( - __AMOR "$zero, %[global], %[buddy] \n" - : [buddy] "+ZB" (buddy->pte) - : [global] "r" (_PAGE_GLOBAL) - : "memory"); - - DBAR(0b11000); /* o_wrw =3D 0b11000 */ -#else /* !CONFIG_SMP */ - WRITE_ONCE(*buddy, __pte(pte_val(ptep_get(buddy)) | _PAGE_GLOBAL)); -#endif /* CONFIG_SMP */ - } - } } =20 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte= _t *ptep) { - /* Preserve global status for the pair */ - if (pte_val(ptep_get(ptep_buddy(ptep))) & _PAGE_GLOBAL) - set_pte(ptep, __pte(_PAGE_GLOBAL)); - else - set_pte(ptep, __pte(0)); + pte_t pte; + + pte =3D ptep_get(ptep); + pte_val(pte) &=3D _PAGE_GLOBAL; + set_pte(ptep, pte); } =20 #define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1) --=20 2.39.3