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[71.34.69.82]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71e49a7e5e7sm5611109b3a.179.2024.10.14.10.54.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2024 10:54:39 -0700 (PDT) From: Drew Fustini Date: Mon, 14 Oct 2024 10:54:22 -0700 Subject: [PATCH 5/8] riscv: dts: thead: Add TH1520 pinctrl settings for UART0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241014-th1520-pinctrl-dts-v1-5-268592ca786e@tenstorrent.com> References: <20241014-th1520-pinctrl-dts-v1-0-268592ca786e@tenstorrent.com> In-Reply-To: <20241014-th1520-pinctrl-dts-v1-0-268592ca786e@tenstorrent.com> To: Emil Renner Berthing , Drew Fustini , Guo Ren , Fu Wei , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Thomas Bonnefille , Kanak Shilledar Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Drew Fustini X-Mailer: b4 0.14.1 From: Emil Renner Berthing Add pinctrl settings for UART0 used as the default debug console on both the Lichee Pi 4A and BeagleV Ahead boards. Acked-by: Linus Walleij Tested-by: Thomas Bonnefille Signed-off-by: Emil Renner Berthing Signed-off-by: Drew Fustini --- arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 26 ++++++++++++++++++= ++++ arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 26 ++++++++++++++++++= ++++ 2 files changed, 52 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/risc= v/boot/dts/thead/th1520-beaglev-ahead.dts index 1a4154a6ff3b..0484fb390be4 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -61,6 +61,30 @@ &emmc { status =3D "okay"; }; =20 +&padctrl0_apsys { + uart0_pins: uart0-0 { + tx-pins { + pins =3D "UART0_TXD"; + function =3D "uart"; + bias-disable; + drive-strength =3D <3>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + + rx-pins { + pins =3D "UART0_RXD"; + function =3D "uart"; + bias-pull-up; + drive-strength =3D <1>; + input-enable; + input-schmitt-enable; + slew-rate =3D <0>; + }; + }; +}; + &sdio0 { bus-width =3D <4>; max-frequency =3D <198000000>; @@ -68,6 +92,8 @@ &sdio0 { }; =20 &uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_pins>; status =3D "okay"; }; =20 diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv= /boot/dts/thead/th1520-lichee-pi-4a.dts index 58ad381fc1c3..f60b1879192d 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts @@ -30,7 +30,33 @@ chosen { }; }; =20 +&padctrl0_apsys { + uart0_pins: uart0-0 { + tx-pins { + pins =3D "UART0_TXD"; + function =3D "uart"; + bias-disable; + drive-strength =3D <3>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + + rx-pins { + pins =3D "UART0_RXD"; + function =3D "uart"; + bias-disable; + drive-strength =3D <1>; + input-enable; + input-schmitt-enable; + slew-rate =3D <0>; + }; + }; +}; + &uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_pins>; status =3D "okay"; }; =20 --=20 2.34.1