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[71.34.69.82]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71e49a7e5e7sm5611109b3a.179.2024.10.14.10.54.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2024 10:54:32 -0700 (PDT) From: Drew Fustini Date: Mon, 14 Oct 2024 10:54:20 -0700 Subject: [PATCH 3/8] riscv: dts: thead: Adjust TH1520 GPIO labels Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241014-th1520-pinctrl-dts-v1-3-268592ca786e@tenstorrent.com> References: <20241014-th1520-pinctrl-dts-v1-0-268592ca786e@tenstorrent.com> In-Reply-To: <20241014-th1520-pinctrl-dts-v1-0-268592ca786e@tenstorrent.com> To: Emil Renner Berthing , Drew Fustini , Guo Ren , Fu Wei , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Thomas Bonnefille , Kanak Shilledar Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Drew Fustini X-Mailer: b4 0.14.1 From: Emil Renner Berthing Adjust labels for the TH1520 GPIO controllers such that GPIOs can be referenced by the names used by the documentation. Eg. GPIO0_X -> <&gpio0 X Y> GPIO1_X -> <&gpio1 X Y> GPIO2_X -> <&gpio2 X Y> GPIO3_X -> <&gpio3 X Y> GPIO4_X -> <&gpio4 X Y> AOGPIO_X -> <&aogpio X Y> Remove labels for the parent GPIO devices that shouldn't need to be referenced. Acked-by: Linus Walleij Tested-by: Thomas Bonnefille Signed-off-by: Emil Renner Berthing Signed-off-by: Drew Fustini --- arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 2 ++ arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 2 ++ arch/riscv/boot/dts/thead/th1520.dtsi | 24 +++++++++++-------= ---- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/risc= v/boot/dts/thead/th1520-beaglev-ahead.dts index 497d961456f3..1a4154a6ff3b 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -17,6 +17,8 @@ aliases { gpio1 =3D &gpio1; gpio2 =3D &gpio2; gpio3 =3D &gpio3; + gpio4 =3D &gpio4; + gpio5 =3D &aogpio; serial0 =3D &uart0; serial1 =3D &uart1; serial2 =3D &uart2; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv= /boot/dts/thead/th1520-lichee-pi-4a.dts index 7738d2895c5a..58ad381fc1c3 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts @@ -14,6 +14,8 @@ aliases { gpio1 =3D &gpio1; gpio2 =3D &gpio2; gpio3 =3D &gpio3; + gpio4 =3D &gpio4; + gpio5 =3D &aogpio; serial0 =3D &uart0; serial1 =3D &uart1; serial2 =3D &uart2; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/th= ead/th1520.dtsi index 9c6cbb4fc3d7..31725c3a13d7 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -323,14 +323,14 @@ uart3: serial@ffe7f04000 { status =3D "disabled"; }; =20 - gpio2: gpio@ffe7f34000 { + gpio@ffe7f34000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xe7f34000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&clk CLK_GPIO2>; =20 - portc: gpio-controller@0 { + gpio2: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -343,14 +343,14 @@ portc: gpio-controller@0 { }; }; =20 - gpio3: gpio@ffe7f38000 { + gpio@ffe7f38000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xe7f38000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&clk CLK_GPIO3>; =20 - portd: gpio-controller@0 { + gpio3: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -370,14 +370,14 @@ padctrl1_apsys: pinctrl@ffe7f3c000 { thead,pad-group =3D <2>; }; =20 - gpio0: gpio@ffec005000 { + gpio@ffec005000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xec005000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&clk CLK_GPIO0>; =20 - porta: gpio-controller@0 { + gpio0: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -390,14 +390,14 @@ porta: gpio-controller@0 { }; }; =20 - gpio1: gpio@ffec006000 { + gpio@ffec006000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xec006000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&clk CLK_GPIO1>; =20 - portb: gpio-controller@0 { + gpio1: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -545,13 +545,13 @@ timer7: timer@ffffc3303c { status =3D "disabled"; }; =20 - ao_gpio0: gpio@fffff41000 { + gpio@fffff41000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xfff41000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; =20 - porte: gpio-controller@0 { + aogpio: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -571,13 +571,13 @@ padctrl_aosys: pinctrl@fffff4a000 { thead,pad-group =3D <1>; }; =20 - ao_gpio1: gpio@fffff52000 { + gpio@fffff52000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xfff52000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; =20 - portf: gpio-controller@0 { + gpio4: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; --=20 2.34.1