From nobody Wed Nov 27 04:46:46 2024 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1436B1A4F08; Mon, 14 Oct 2024 09:08:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728896924; cv=none; b=LO26VcGQxG8WYNcrEoBvI+iILbSMVYGrVN1QTMYyPIvTwtSvWyIvrJ/gG1G1YcBRmTSloinm/5Av0thj3Oa6XlBC6oXIiy005CGCzMEhIdzspbaYpWKg/0udl8NDZhMmJEmExjz9txBlUd9PLM4rqW5xMWnpmUuMPh/W13eC8ss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728896924; c=relaxed/simple; bh=Y5xLeD2IuTHvRHaIJIEIFVVrN+/xt2lvtxa4QA9F6o4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=nzl1UzvlEPz2wn/FV9exLQKEJhKFn87uNlUcg9kEJyUX0bEuo35tOYE2yTdgXJ19ccX68wCsLAQQfMWvIP1818auU0GfZpLc5RDcQTewef71HgpHMlFfRuhOvnv9CkfpxcyMZCfTmqBL1MKSFY5rmYKNPfE5/86MRX/T/i+8sIU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=NAbSTT4l; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="NAbSTT4l" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49DMIouv017717; Mon, 14 Oct 2024 09:08:38 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= J8PSPoYblQUROVWlAXenrXorzS8In/LKAjrXaRXNL3E=; b=NAbSTT4la71dlKw/ jLVzX72cKXELAQXI6YBZ2IMPiLkZ5ORq14Tzx3q6Z4N/Aj3nQkNHtyFYm3JsMX3c sWgomeZHrvqyuAFsmgXJ/ggn6rUjSkVIyKY2PZC5MLqv+0zY7kibqIbZRz7AYRGg NjclRAWreEEC9v5uqXoReuWskiNyb+VyWyX3c2KdoSxSqkDUL07kCOZSoXVq7975 dT7jy9U3jHFsh1U0FI21/SR7RC2uN4I/94zYouhkg52U+ouvHFy+UjTpIIYEpuLe KN0bJqJcLN5w44vvABaAJFTtwICjCvn/qIbTGYAn6J8s2mkj6Sa4cXuMWi3uPhzJ OxWR3Q== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 427hvfutc4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 14 Oct 2024 09:08:38 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49E98bKF015440 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 14 Oct 2024 09:08:37 GMT Received: from hu-dikshita-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 14 Oct 2024 02:08:33 -0700 From: Dikshita Agarwal Date: Mon, 14 Oct 2024 14:37:34 +0530 Subject: [PATCH v4 13/28] media: iris: implement subscribe_event and unsubscribe_event ioctls Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20241014-qcom-video-iris-v4-v4-13-c5eaa4e9ab9e@quicinc.com> References: <20241014-qcom-video-iris-v4-v4-0-c5eaa4e9ab9e@quicinc.com> In-Reply-To: <20241014-qcom-video-iris-v4-v4-0-c5eaa4e9ab9e@quicinc.com> To: Vikash Garodia , Abhinav Kumar , Mauro Carvalho Chehab , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Philipp Zabel CC: Hans Verkuil , Sebastian Fricke , , , , , Dikshita Agarwal , Vedang Nagar X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1728896854; l=4898; i=quic_dikshita@quicinc.com; s=20240917; h=from:subject:message-id; bh=OvFbHAOKb3Z0ayZVjw3e1o0EbuY4/nf9ypdmDpk9zc4=; b=tv4+MdNDFidsXT8XIlFHX14rTS83U6yxbvZ+Q6NPGlql0HkVZmXPYUTwk5sb90HbrEZUwm9Jt rLTHJ0E4jWTATgiNz2fj5XkFDzfkmPVbpBJJ/si9pbOqPeqRyQUD/sl X-Developer-Key: i=quic_dikshita@quicinc.com; a=ed25519; pk=EEvKY6Ar1OI5SWf44FJ1Ebo1KuQEVbbf5UNPO+UHVhM= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: rCYylz38WFV8LeLwITRfywQJ8J3hTnbo X-Proofpoint-ORIG-GUID: rCYylz38WFV8LeLwITRfywQJ8J3hTnbo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 mlxscore=0 clxscore=1015 adultscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410140066 From: Vedang Nagar Implement subscribe_event and unsubscribe_event iocts with necessary hooks. Signed-off-by: Vedang Nagar Signed-off-by: Dikshita Agarwal --- drivers/media/platform/qcom/iris/iris_instance.h | 2 ++ drivers/media/platform/qcom/iris/iris_vdec.c | 26 ++++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_vdec.h | 1 + drivers/media/platform/qcom/iris/iris_vidc.c | 17 ++++++++++++++++ 4 files changed, 46 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_instance.h b/drivers/med= ia/platform/qcom/iris/iris_instance.h index bb43119af352..d28b8fd7ec2f 100644 --- a/drivers/media/platform/qcom/iris/iris_instance.h +++ b/drivers/media/platform/qcom/iris/iris_instance.h @@ -30,6 +30,7 @@ * @once_per_session_set: boolean to set once per session property * @m2m_dev: a reference to m2m device structure * @m2m_ctx: a reference to m2m context structure + * @subscriptions: variable to hold current events subscriptions */ =20 struct iris_inst { @@ -48,6 +49,7 @@ struct iris_inst { bool once_per_session_set; struct v4l2_m2m_dev *m2m_dev; struct v4l2_m2m_ctx *m2m_ctx; + unsigned int subscriptions; }; =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_vdec.c b/drivers/media/p= latform/qcom/iris/iris_vdec.c index fd0f1ebc33e8..c4eeba5ed6da 100644 --- a/drivers/media/platform/qcom/iris/iris_vdec.c +++ b/drivers/media/platform/qcom/iris/iris_vdec.c @@ -3,6 +3,7 @@ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights res= erved. */ =20 +#include #include =20 #include "iris_buffer.h" @@ -13,6 +14,7 @@ #define DEFAULT_WIDTH 320 #define DEFAULT_HEIGHT 240 #define DEFAULT_CODEC_ALIGNMENT 16 +#define MAX_EVENTS 30 =20 void iris_vdec_inst_init(struct iris_inst *inst) { @@ -208,3 +210,27 @@ int iris_vdec_s_fmt(struct iris_inst *inst, struct v4l= 2_format *f) =20 return 0; } + +int iris_vdec_subscribe_event(struct iris_inst *inst, const struct v4l2_ev= ent_subscription *sub) +{ + int ret =3D 0; + + switch (sub->type) { + case V4L2_EVENT_EOS: + ret =3D v4l2_event_subscribe(&inst->fh, sub, MAX_EVENTS, NULL); + inst->subscriptions |=3D V4L2_EVENT_EOS; + break; + case V4L2_EVENT_SOURCE_CHANGE: + ret =3D v4l2_src_change_event_subscribe(&inst->fh, sub); + inst->subscriptions |=3D V4L2_EVENT_SOURCE_CHANGE; + break; + case V4L2_EVENT_CTRL: + ret =3D v4l2_ctrl_subscribe_event(&inst->fh, sub); + inst->subscriptions |=3D V4L2_EVENT_CTRL; + break; + default: + return -EINVAL; + } + + return ret; +} diff --git a/drivers/media/platform/qcom/iris/iris_vdec.h b/drivers/media/p= latform/qcom/iris/iris_vdec.h index eb8a1121ae92..707fff34bf4d 100644 --- a/drivers/media/platform/qcom/iris/iris_vdec.h +++ b/drivers/media/platform/qcom/iris/iris_vdec.h @@ -13,5 +13,6 @@ void iris_vdec_inst_deinit(struct iris_inst *inst); int iris_vdec_enum_fmt(struct iris_inst *inst, struct v4l2_fmtdesc *f); int iris_vdec_try_fmt(struct iris_inst *inst, struct v4l2_format *f); int iris_vdec_s_fmt(struct iris_inst *inst, struct v4l2_format *f); +int iris_vdec_subscribe_event(struct iris_inst *inst, const struct v4l2_ev= ent_subscription *sub); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_vidc.c b/drivers/media/p= latform/qcom/iris/iris_vidc.c index 1d6c5e8fafb4..8068c06c1f11 100644 --- a/drivers/media/platform/qcom/iris/iris_vidc.c +++ b/drivers/media/platform/qcom/iris/iris_vidc.c @@ -4,6 +4,7 @@ */ =20 #include +#include #include #include =20 @@ -320,6 +321,20 @@ static int iris_g_selection(struct file *filp, void *f= h, struct v4l2_selection * return 0; } =20 +static int iris_subscribe_event(struct v4l2_fh *fh, const struct v4l2_even= t_subscription *sub) +{ + struct iris_inst *inst =3D container_of(fh, struct iris_inst, fh); + + return iris_vdec_subscribe_event(inst, sub); +} + +static int iris_unsubscribe_event(struct v4l2_fh *fh, const struct v4l2_ev= ent_subscription *sub) +{ + struct iris_inst *inst =3D container_of(fh, struct iris_inst, fh); + + return v4l2_event_unsubscribe(&inst->fh, sub); +} + static struct v4l2_file_operations iris_v4l2_file_ops =3D { .owner =3D THIS_MODULE, .open =3D iris_open, @@ -345,6 +360,8 @@ static const struct v4l2_ioctl_ops iris_v4l2_ioctl_ops = =3D { .vidioc_enum_framesizes =3D iris_enum_framesizes, .vidioc_reqbufs =3D v4l2_m2m_ioctl_reqbufs, .vidioc_g_selection =3D iris_g_selection, + .vidioc_subscribe_event =3D iris_subscribe_event, + .vidioc_unsubscribe_event =3D iris_unsubscribe_event, }; =20 void iris_init_ops(struct iris_core *core) --=20 2.34.1