From nobody Wed Nov 27 08:40:21 2024 Received: from relay.smtp-ext.broadcom.com (relay.smtp-ext.broadcom.com [192.19.144.207]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6061224D7; Sat, 12 Oct 2024 03:05:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.19.144.207 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728702348; cv=none; b=eJ6PJZtKkXcHQubb+4aNfck9eal9SgD20yNMce8qd9SJkO3FMo0Ji13InR7sKweCx2oBOJFeAHBVWNT+rwHGxb1HRKbXNC/Y5Zjbt6OYKD9RCIvr0mNm1O8BPb4zy4ivR+4y6aebKtWILNF+8ZwJ1TgLPPM+PBbQw8JRQp8aHGw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728702348; c=relaxed/simple; bh=xcbxZozTzOOydjpY37v/9USjfCOMyBAeZHXAiSdCmSQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LxI/OUXLy0Y8nGxrI4DlG2CxN3ato4EFLZF68NtXkNaORaqzojULJDJjP0PLqdEb91dmvI8H+DhIplzYWm/ooYuKCy2Dbq5M1BMTltHbh5sBKh3LLl4XyzDdA9S1kv20r7zJjUVsPTqWRjOcDVdDT7nMrqgWOgDID+5YMkTLhE8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com; spf=fail smtp.mailfrom=broadcom.com; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b=Y4qnNvNl; arc=none smtp.client-ip=192.19.144.207 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=broadcom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="Y4qnNvNl" Received: from mail-lvn-it-01.lvn.broadcom.net (mail-lvn-it-01.lvn.broadcom.net [10.36.132.253]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id AEFE0C0000F1; Fri, 11 Oct 2024 19:56:10 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com AEFE0C0000F1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1728701770; bh=xcbxZozTzOOydjpY37v/9USjfCOMyBAeZHXAiSdCmSQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y4qnNvNlFxWS1FvRM9AXNoGD0hKC+Ezc+/DYFDglxWqw2lgE+y/nwbPwHxgbvxfLD cpnzcl+UiVnmTjCJUEJdIhVvP6vWuL4xMjFIjEmdnyPwgzbc+lyzaYGxBpCrDaGhWm duAAIAk1m/EhC02do1VBTXbYBskcBYHn6ZsuxraY= Received: from stbirv-lnx-1.igp.broadcom.net (stbirv-lnx-1.igp.broadcom.net [10.67.48.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 5825318041CAC6; Fri, 11 Oct 2024 19:56:10 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Broadcom internal kernel review list , Thierry Reding , linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), justin.chen@broadcom.com Subject: [PATCH 2/2] pwm: brcmstb: Do not assume open drain configuration Date: Fri, 11 Oct 2024 19:56:03 -0700 Message-Id: <20241012025603.1644451-3-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241012025603.1644451-1-florian.fainelli@broadcom.com> References: <20241012025603.1644451-1-florian.fainelli@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Read the 'open-drain' property to determine whether the PWM controller output(s) should be configured in open-drain versus totem pole mode. Fixes: 3a9f5957020f ("pwm: Add Broadcom BCM7038 PWM controller support") Signed-off-by: Florian Fainelli --- drivers/pwm/pwm-brcmstb.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-brcmstb.c b/drivers/pwm/pwm-brcmstb.c index 0fdeb0b2dbf3..b7cecd36ed57 100644 --- a/drivers/pwm/pwm-brcmstb.c +++ b/drivers/pwm/pwm-brcmstb.c @@ -55,6 +55,7 @@ struct brcmstb_pwm { void __iomem *base; struct clk *clk; struct pwm_chip chip; + bool open_drain; }; =20 static inline u32 brcmstb_pwm_readl(struct brcmstb_pwm *p, @@ -176,6 +177,7 @@ static int brcmstb_pwm_config(struct pwm_chip *chip, st= ruct pwm_device *pwm, static inline void brcmstb_pwm_enable_set(struct brcmstb_pwm *p, unsigned int channel, bool enable) { + u32 oe_mask =3D p->open_drain ? CTRL_OPENDRAIN : 0; unsigned int shift =3D channel * CTRL_CHAN_OFFS; u32 value; =20 @@ -183,9 +185,9 @@ static inline void brcmstb_pwm_enable_set(struct brcmst= b_pwm *p, =20 if (enable) { value &=3D ~(CTRL_OEB << shift); - value |=3D (CTRL_START | CTRL_OPENDRAIN) << shift; + value |=3D (CTRL_START | oe_mask) << shift; } else { - value &=3D ~((CTRL_START | CTRL_OPENDRAIN) << shift); + value &=3D ~((CTRL_START | oe_mask) << shift); value |=3D CTRL_OEB << shift; } =20 @@ -244,6 +246,7 @@ static int brcmstb_pwm_probe(struct platform_device *pd= ev) =20 platform_set_drvdata(pdev, p); =20 + p->open_drain =3D device_property_read_bool(&pdev->dev, "open-drain"); p->chip.dev =3D &pdev->dev; p->chip.ops =3D &brcmstb_pwm_ops; p->chip.npwm =3D 2; --=20 2.34.1