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Since we are at here, also add the alias for all lpi2c and gpio nodes. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 69 +++++++++++++++++++= ++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64= /boot/dts/freescale/imx95-19x19-evk.dts index 5101cd171e095fb5209464055a52ebdfa7dc5a61..6086cb7fa5a0e14882be3a8c609= 725e15c179392 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -22,6 +22,19 @@ / { compatible =3D "fsl,imx95-19x19-evk", "fsl,imx95"; =20 aliases { + gpio0 =3D &gpio1; + gpio1 =3D &gpio2; + gpio2 =3D &gpio3; + gpio3 =3D &gpio4; + gpio4 =3D &gpio5; + i2c0 =3D &lpi2c1; + i2c1 =3D &lpi2c2; + i2c2 =3D &lpi2c3; + i2c3 =3D &lpi2c4; + i2c4 =3D &lpi2c5; + i2c5 =3D &lpi2c6; + i2c6 =3D &lpi2c7; + i2c7 =3D &lpi2c8; mmc0 =3D &usdhc1; mmc1 =3D &usdhc2; serial0 =3D &lpuart1; @@ -241,6 +254,42 @@ i2c4_gpio_expander_21: gpio@21 { }; }; =20 +&lpi2c5 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpi2c5>; + status =3D "okay"; + + i2c5_pcal6408: gpio@21 { + compatible =3D "nxp,pcal6408"; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + vcc-supply =3D <®_3p3v>; + }; +}; + +&lpi2c6 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpi2c6>; + status =3D "okay"; + + i2c6_pcal6416: gpio@21 { + compatible =3D "nxp,pcal6416"; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gpio4>; + interrupts =3D <28 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pcal6416>; + vcc-supply =3D <®_3p3v>; + }; +}; + &lpi2c7 { clock-frequency =3D <1000000>; pinctrl-names =3D "default"; @@ -427,6 +476,20 @@ IMX95_PAD_GPIO_IO31__LPI2C4_SCL 0x40000b9e >; }; =20 + pinctrl_lpi2c5: lpi2c5grp { + fsl,pins =3D < + IMX95_PAD_GPIO_IO22__LPI2C5_SDA 0x40000b9e + IMX95_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e + >; + }; + + pinctrl_lpi2c6: lpi2c6grp { + fsl,pins =3D < + IMX95_PAD_GPIO_IO02__LPI2C6_SDA 0x40000b9e + IMX95_PAD_GPIO_IO03__LPI2C6_SCL 0x40000b9e + >; + }; + pinctrl_lpi2c7: lpi2c7grp { fsl,pins =3D < IMX95_PAD_GPIO_IO08__LPI2C7_SDA 0x40000b9e @@ -446,6 +509,12 @@ IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B 0x400= 0031e >; }; =20 + pinctrl_pcal6416: pcal6416grp { + fsl,pins =3D < + IMX95_PAD_CCM_CLKO3__GPIO4_IO_BIT28 0x31e + >; + }; + pinctrl_pdm: pdmgrp { fsl,pins =3D < IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK 0x31e --=20 2.37.1