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NXP i.MX95 SCMI Firmware designation does not allow timeout, it will not recover if the Agents use timeout design. So set a large value (5000ms) here. Signed-off-by: Peng Fan Acked-by: Alexander Stein --- arch/arm64/boot/dts/freescale/imx95.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index 03661e76550f4d5b8e5e706ad51d6f7620cb1dc3..9c802c2344fcfb2802e5d52c762= b0178a2a88ba8 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -293,6 +293,7 @@ scmi { shmem =3D <&scmi_buf0>, <&scmi_buf1>; #address-cells =3D <1>; #size-cells =3D <0>; + max-rx-timeout-ms =3D <5000>; =20 scmi_devpd: protocol@11 { reg =3D <0x11>; --=20 2.37.1 From nobody Wed Nov 27 04:34:06 2024 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2067.outbound.protection.outlook.com [40.107.20.67]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3236F16C6A7; Sat, 12 Oct 2024 11:10:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Reviewed-by: Alexander Stein Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx95.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index 9c802c2344fcfb2802e5d52c762b0178a2a88ba8..7f4e7579cdb395177c28f41159d= f36b871a6384e 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -300,6 +300,10 @@ scmi_devpd: protocol@11 { #power-domain-cells =3D <1>; }; =20 + scmi_sys_power: protocol@12 { + reg =3D <0x12>; + }; + scmi_perf: protocol@13 { reg =3D <0x13>; #power-domain-cells =3D <1>; @@ -319,6 +323,13 @@ scmi_iomuxc: protocol@19 { reg =3D <0x19>; }; =20 + scmi_bbm: protocol@81 { + reg =3D <0x81>; + }; + + scmi_misc: protocol@84 { + reg =3D <0x84>; + }; }; }; =20 --=20 2.37.1 From nobody Wed Nov 27 04:34:06 2024 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2067.outbound.protection.outlook.com [40.107.20.67]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C14B170A26; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index 7f4e7579cdb395177c28f41159df36b871a6384e..a96bf8e6a1a29f06741cdf5ac20= e414ce71b5c03 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -346,13 +346,13 @@ a55-thermal { =20 trips { cpu_alert0: trip0 { - temperature =3D <85000>; + temperature =3D <105000>; hysteresis =3D <2000>; type =3D "passive"; }; =20 cpu_crit0: trip1 { - temperature =3D <95000>; + temperature =3D <125000>; hysteresis =3D <2000>; type =3D "critical"; }; --=20 2.37.1 From nobody Wed Nov 27 04:34:06 2024 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2075.outbound.protection.outlook.com [40.107.20.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33FC718453F; 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This is to add the anamix temperature thermal zone and its cooling device. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx95.dtsi | 32 ++++++++++++++++++++++++++++= ++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index a96bf8e6a1a29f06741cdf5ac20e414ce71b5c03..ae8e09203ef431d8869fdce79df= 9f31a3e55971c 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -371,6 +371,38 @@ map0 { }; }; }; + + ana-thermal { + polling-delay-passive =3D <250>; + polling-delay =3D <2000>; + thermal-sensors =3D <&scmi_sensor 0>; + trips { + ana_alert: trip0 { + temperature =3D <105000>; + hysteresis =3D <2000>; + type =3D "passive"; + }; + + ana_crit0: trip1 { + temperature =3D <125000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + + cooling-maps { + map0 { + trip =3D <&ana_alert>; + cooling-device =3D + <&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A55_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A55_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A55_4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A55_5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx95.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index ae8e09203ef431d8869fdce79df9f31a3e55971c..62bb526ba507b9fefc8d90743d6= 53e9dadf030ef 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -22,12 +22,27 @@ cpus { #address-cells =3D <1>; #size-cells =3D <0>; =20 + idle-states { + entry-method =3D "psci"; + + cpu_pd_wait: cpu-pd-wait { + compatible =3D "arm,idle-state"; + arm,psci-suspend-param =3D <0x0010033>; + local-timer-stop; + entry-latency-us =3D <10000>; + exit-latency-us =3D <7000>; + min-residency-us =3D <27000>; + wakeup-latency-us =3D <15000>; + }; + }; + A55_0: cpu@0 { device_type =3D "cpu"; compatible =3D "arm,cortex-a55"; reg =3D <0x0>; enable-method =3D "psci"; #cooling-cells =3D <2>; + cpu-idle-states =3D <&cpu_pd_wait>; power-domains =3D <&scmi_perf IMX95_PERF_A55>; power-domain-names =3D "perf"; i-cache-size =3D <32768>; @@ -45,6 +60,7 @@ A55_1: cpu@100 { reg =3D <0x100>; enable-method =3D "psci"; #cooling-cells =3D <2>; + cpu-idle-states =3D <&cpu_pd_wait>; power-domains =3D <&scmi_perf IMX95_PERF_A55>; power-domain-names =3D "perf"; i-cache-size =3D <32768>; @@ -62,6 +78,7 @@ A55_2: cpu@200 { reg =3D <0x200>; enable-method =3D "psci"; #cooling-cells =3D <2>; + cpu-idle-states =3D <&cpu_pd_wait>; power-domains =3D <&scmi_perf IMX95_PERF_A55>; power-domain-names =3D "perf"; i-cache-size =3D <32768>; @@ -79,6 +96,7 @@ A55_3: cpu@300 { reg =3D <0x300>; enable-method =3D "psci"; #cooling-cells =3D <2>; + cpu-idle-states =3D <&cpu_pd_wait>; power-domains =3D <&scmi_perf IMX95_PERF_A55>; power-domain-names =3D "perf"; i-cache-size =3D <32768>; @@ -98,6 +116,7 @@ A55_4: cpu@400 { power-domain-names =3D "perf"; enable-method =3D "psci"; #cooling-cells =3D <2>; + cpu-idle-states =3D <&cpu_pd_wait>; i-cache-size =3D <32768>; i-cache-line-size =3D <64>; i-cache-sets =3D <128>; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64= /boot/dts/freescale/imx95-19x19-evk.dts index 37a1d4ca1b2079880f6a0397027c22c5e471bd40..5101cd171e095fb5209464055a5= 2ebdfa7dc5a61 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -8,6 +8,15 @@ #include #include "imx95.dtsi" =20 +#define FALLING_EDGE 1 +#define RISING_EDGE 2 + +#define BRD_SM_CTRL_SD3_WAKE 0x8000 /* PCAL6408A-0 */ +#define BRD_SM_CTRL_PCIE1_WAKE 0x8001 /* PCAL6408A-4 */ +#define BRD_SM_CTRL_BT_WAKE 0x8002 /* PCAL6408A-5 */ +#define BRD_SM_CTRL_PCIE2_WAKE 0x8003 /* PCAL6408A-6 */ +#define BRD_SM_CTRL_BUTTON 0x8004 /* PCAL6408A-7 */ + / { model =3D "NXP i.MX95 19X19 board"; compatible =3D "fsl,imx95-19x19-evk", "fsl,imx95"; @@ -357,6 +366,14 @@ &usdhc2 { status =3D "okay"; }; =20 +&scmi_misc { + nxp,ctrl-ids =3D ; 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Since we are at here, also add the alias for all lpi2c and gpio nodes. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 69 +++++++++++++++++++= ++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64= /boot/dts/freescale/imx95-19x19-evk.dts index 5101cd171e095fb5209464055a52ebdfa7dc5a61..6086cb7fa5a0e14882be3a8c609= 725e15c179392 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -22,6 +22,19 @@ / { compatible =3D "fsl,imx95-19x19-evk", "fsl,imx95"; =20 aliases { + gpio0 =3D &gpio1; + gpio1 =3D &gpio2; + gpio2 =3D &gpio3; + gpio3 =3D &gpio4; + gpio4 =3D &gpio5; + i2c0 =3D &lpi2c1; + i2c1 =3D &lpi2c2; + i2c2 =3D &lpi2c3; + i2c3 =3D &lpi2c4; + i2c4 =3D &lpi2c5; + i2c5 =3D &lpi2c6; + i2c6 =3D &lpi2c7; + i2c7 =3D &lpi2c8; mmc0 =3D &usdhc1; mmc1 =3D &usdhc2; serial0 =3D &lpuart1; @@ -241,6 +254,42 @@ i2c4_gpio_expander_21: gpio@21 { }; }; =20 +&lpi2c5 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpi2c5>; + status =3D "okay"; + + i2c5_pcal6408: gpio@21 { + compatible =3D "nxp,pcal6408"; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + vcc-supply =3D <®_3p3v>; + }; +}; + +&lpi2c6 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpi2c6>; + status =3D "okay"; + + i2c6_pcal6416: gpio@21 { + compatible =3D "nxp,pcal6416"; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gpio4>; + interrupts =3D <28 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pcal6416>; + vcc-supply =3D <®_3p3v>; + }; +}; + &lpi2c7 { clock-frequency =3D <1000000>; pinctrl-names =3D "default"; @@ -427,6 +476,20 @@ IMX95_PAD_GPIO_IO31__LPI2C4_SCL 0x40000b9e >; }; =20 + pinctrl_lpi2c5: lpi2c5grp { + fsl,pins =3D < + IMX95_PAD_GPIO_IO22__LPI2C5_SDA 0x40000b9e + IMX95_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e + >; + }; + + pinctrl_lpi2c6: lpi2c6grp { + fsl,pins =3D < + IMX95_PAD_GPIO_IO02__LPI2C6_SDA 0x40000b9e + IMX95_PAD_GPIO_IO03__LPI2C6_SCL 0x40000b9e + >; + }; + pinctrl_lpi2c7: lpi2c7grp { fsl,pins =3D < IMX95_PAD_GPIO_IO08__LPI2C7_SDA 0x40000b9e @@ -446,6 +509,12 @@ IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B 0x400= 0031e >; }; =20 + pinctrl_pcal6416: pcal6416grp { + fsl,pins =3D < + IMX95_PAD_CCM_CLKO3__GPIO4_IO_BIT28 0x31e + >; + }; + pinctrl_pdm: pdmgrp { fsl,pins =3D < IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK 0x31e --=20 2.37.1