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([194.62.169.86]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99c0c89bfasm54134666b.162.2024.10.11.07.48.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Oct 2024 07:48:31 -0700 (PDT) From: Emil Renner Berthing To: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Linus Walleij , Jisheng Zhang , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt , Thomas Bonnefille Subject: [PATCH v1 3/3] pinctrl: th1520: Factor out casts Date: Fri, 11 Oct 2024 16:48:25 +0200 Message-ID: <20241011144826.381104-4-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241011144826.381104-1-emil.renner.berthing@canonical.com> References: <20241011144826.381104-1-emil.renner.berthing@canonical.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Limit the casts to get the mux data and flags from the driver data pointer with each pin to two inline functions as requested by Andy during review. Signed-off-by: Emil Renner Berthing Reviewed-by: Drew Fustini --- drivers/pinctrl/pinctrl-th1520.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/pinctrl-th1520.c b/drivers/pinctrl/pinctrl-th1= 520.c index 8bd40cb2f013..7474d8da32f9 100644 --- a/drivers/pinctrl/pinctrl-th1520.c +++ b/drivers/pinctrl/pinctrl-th1520.c @@ -152,6 +152,16 @@ static enum th1520_muxtype th1520_muxtype_get(const ch= ar *str) (TH1520_MUX_##m0 << 0) | (TH1520_MUX_##m1 << 5) | (TH1520_MUX_##m2 << = 10) | \ (TH1520_MUX_##m3 << 15) | (TH1520_MUX_##m4 << 20) | (TH1520_MUX_##m5 << = 25)) } =20 +static unsigned long th1520_pad_muxdata(void *drv_data) +{ + return (uintptr_t)drv_data & TH1520_PAD_MUXDATA; +} + +static bool th1520_pad_no_padcfg(void *drv_data) +{ + return (uintptr_t)drv_data & TH1520_PAD_NO_PADCFG; +} + static const struct pinctrl_pin_desc th1520_group1_pins[] =3D { TH1520_PAD(0, OSC_CLK_IN, ____, ____, ____, ____, ____, ____, TH1520_= PAD_NO_PADCFG), TH1520_PAD(1, OSC_CLK_OUT, ____, ____, ____, ____, ____, ____, TH1520_= PAD_NO_PADCFG), @@ -590,7 +600,7 @@ static int th1520_pinconf_get(struct pinctrl_dev *pctld= ev, u32 value; u32 arg; =20 - if ((uintptr_t)desc->drv_data & TH1520_PAD_NO_PADCFG) + if (th1520_pad_no_padcfg(desc->drv_data)) return -ENOTSUPP; =20 value =3D readl_relaxed(th1520_padcfg(thp, pin)); @@ -660,7 +670,7 @@ static int th1520_pinconf_set(struct pinctrl_dev *pctld= ev, unsigned int pin, unsigned int i; u16 mask, value; =20 - if ((uintptr_t)desc->drv_data & TH1520_PAD_NO_PADCFG) + if (th1520_pad_no_padcfg(desc->drv_data)) return -ENOTSUPP; =20 mask =3D 0; @@ -793,12 +803,14 @@ static int th1520_pinmux_set_mux(struct pinctrl_dev *= pctldev, { struct th1520_pinctrl *thp =3D pinctrl_dev_get_drvdata(pctldev); const struct function_desc *func =3D pinmux_generic_get_function(pctldev,= fsel); + enum th1520_muxtype muxtype =3D (uintptr_t)func->data; =20 if (!func) return -EINVAL; + return th1520_pinmux_set(thp, thp->desc.pins[gsel].number, - (uintptr_t)thp->desc.pins[gsel].drv_data & TH1520_PAD_MUXDATA, - (uintptr_t)func->data); + th1520_pad_muxdata(thp->desc.pins[gsel].drv_data), + muxtype); } =20 static int th1520_gpio_request_enable(struct pinctrl_dev *pctldev, @@ -809,7 +821,7 @@ static int th1520_gpio_request_enable(struct pinctrl_de= v *pctldev, const struct pin_desc *desc =3D pin_desc_get(pctldev, offset); =20 return th1520_pinmux_set(thp, offset, - (uintptr_t)desc->drv_data & TH1520_PAD_MUXDATA, + th1520_pad_muxdata(desc->drv_data), TH1520_MUX_GPIO); } =20 --=20 2.43.0