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charset="utf-8" PCIe 3rd instance of X1E80100 supports Gen 4 x8 which needs different 8 lane capable QMP PCIe PHY with hardware revision v6.30. Document Gen 4 x8 PHY as separate module. Signed-off-by: Qiang Yu Reviewed-by: Krzysztof Kozlowski Acked-by: Manivannan Sadhasivam --- .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-p= hy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.= yaml index dcf4fa55fbba..680ec3113c2b 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -41,6 +41,7 @@ properties: - qcom,x1e80100-qmp-gen3x2-pcie-phy - qcom,x1e80100-qmp-gen4x2-pcie-phy - qcom,x1e80100-qmp-gen4x4-pcie-phy + - qcom,x1e80100-qmp-gen4x8-pcie-phy =20 reg: minItems: 1 @@ -172,6 +173,7 @@ allOf: - qcom,sc8280xp-qmp-gen3x2-pcie-phy - qcom,sc8280xp-qmp-gen3x4-pcie-phy - qcom,x1e80100-qmp-gen4x4-pcie-phy + - qcom,x1e80100-qmp-gen4x8-pcie-phy then: properties: clocks: @@ -201,6 +203,7 @@ allOf: - qcom,sm8550-qmp-gen4x2-pcie-phy - qcom,sm8650-qmp-gen4x2-pcie-phy - qcom,x1e80100-qmp-gen4x2-pcie-phy + - qcom,x1e80100-qmp-gen4x8-pcie-phy then: properties: resets: --=20 2.34.1