From nobody Wed Nov 27 09:48:22 2024 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C597819D89E; Fri, 11 Oct 2024 06:31:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728628318; cv=none; b=OuacYoTrVKU1FWVbk+uvTbK55fF+iSikvKVghoiJYLAASVWnPe7sONP8Rz/2153hY1vNsI53hm3wnA8IMThfA1fkDoDqC/7K6fxXcUNM/IH3/xYt4c52/6Jf3Dm8UkQXopqxO7xmdOaC+f10tUuei3Jehbx5JyENprx9vF0QUTA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728628318; c=relaxed/simple; bh=09y9CdxPd8AYmSBQS+6okj55KJk8o+SiRxld4l5Mni4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=G98OS42DRigJVis4wgiK9zY/WY64UMzhhzS8RynvCZ7ZN83bJypoadc0nkw7ZUZbIPjJ5LvnSwdF77l3M6gt8J1moJf+8szelegcCKtul4GSN00DQnl7Ta6x9VBav1MDWsVVw23iDA3PRtDczic5CO6V16PQ6IUDJooPdX3ynHU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=MAXvvTIZ; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="MAXvvTIZ" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49B5Q8WX029129; Fri, 11 Oct 2024 06:31:46 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to; s=qcppdkim1; bh=PcNRH/4orviKmARDQHyTk96G pUQN8nmuzoX9c6tZNa8=; b=MAXvvTIZhMuxc+qBWYIjeJuOZ84wOYFKXEUkEdVb s37CswimUiewbnPqE+vxHickRcmdlAGpQJp0FOZXyAbjR7duhclYdMkKDa2uruys q8qspyvnq52KgZliU+I6F5DN8F5onzIFYMj1PALj4uTCCrXx1RuEHqV/dEYM+lV4 3dWJt9bP7xQbLra7v66iuWL7fLl7uALOMBOIrnTlyxjMbAG7UuD5dKakVLcoalne C8XxUMUItm0RnAcYiSoHHI4LhDiO4uarx1pKaueiIPCGKQTRCA84LoriZ4QnKpPy JGqfiwuK7soOQG3axk2vqjgic1epNn81AbLhr1YVybcOUw== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 426g6na2ff-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Oct 2024 06:31:46 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49B6Vjs9006110 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Oct 2024 06:31:45 GMT Received: from hu-qqzhou-sha.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 10 Oct 2024 23:31:42 -0700 From: Qingqing Zhou To: , , , , , , , , , CC: , , , , Qingqing Zhou Subject: [PATCH 1/4] dt-bindings: firmware: qcom,scm: document SCM on QCS615 Date: Fri, 11 Oct 2024 12:01:09 +0530 Message-ID: <20241011063112.19087-2-quic_qqzhou@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241011063112.19087-1-quic_qqzhou@quicinc.com> References: <20241011063112.19087-1-quic_qqzhou@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Uohk2tPDagd5TVcJTuJqNWISRPz6PK3K X-Proofpoint-GUID: Uohk2tPDagd5TVcJTuJqNWISRPz6PK3K X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 impostorscore=0 mlxlogscore=999 mlxscore=0 spamscore=0 phishscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410110042 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document scm compatible for QCS615 SoCs. It is an interface to communicate to the secure firmware. Signed-off-by: Qingqing Zhou Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Doc= umentation/devicetree/bindings/firmware/qcom,scm.yaml index 2cc83771d8e7..2a94d02f11a1 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -42,6 +42,7 @@ properties: - qcom,scm-msm8996 - qcom,scm-msm8998 - qcom,scm-qcm2290 + - qcom,scm-qcs615 - qcom,scm-qdu1000 - qcom,scm-sa8775p - qcom,scm-sc7180 --=20 2.17.1 From nobody Wed Nov 27 09:48:22 2024 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CECE319AD94; Fri, 11 Oct 2024 06:31:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 11 Oct 2024 06:31:49 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49B6VmVA012907 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Oct 2024 06:31:48 GMT Received: from hu-qqzhou-sha.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 10 Oct 2024 23:31:45 -0700 From: Qingqing Zhou To: , , , , , , , , , CC: , , , , Qingqing Zhou Subject: [PATCH 2/4] dt-bindings: arm-smmu: Document Qualcomm QCS615 apps smmu Date: Fri, 11 Oct 2024 12:01:10 +0530 Message-ID: <20241011063112.19087-3-quic_qqzhou@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241011063112.19087-1-quic_qqzhou@quicinc.com> References: <20241011063112.19087-1-quic_qqzhou@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: b3fplWy13m8Wtpxl87qbmN7pmmTwzwr3 X-Proofpoint-ORIG-GUID: b3fplWy13m8Wtpxl87qbmN7pmmTwzwr3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 clxscore=1015 impostorscore=0 phishscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 mlxlogscore=997 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410110042 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add devicetree binding for apps smmu on Qualcomm QCS615 SoC. SMMU function is required by multiple functions including USB/UFS/Ethernet. Signed-off-by: Qingqing Zhou --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Docume= ntation/devicetree/bindings/iommu/arm,smmu.yaml index 92d350b8e01a..9e62c2cdda08 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -36,6 +36,7 @@ properties: items: - enum: - qcom,qcm2290-smmu-500 + - qcom,qcs615-smmu-500 - qcom,qcs8300-smmu-500 - qcom,qdu1000-smmu-500 - qcom,sa8255p-smmu-500 --=20 2.17.1 From nobody Wed Nov 27 09:48:22 2024 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5453E209F56; Fri, 11 Oct 2024 06:32:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; 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Fri, 11 Oct 2024 06:31:53 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49B6VqFe007190 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Oct 2024 06:31:52 GMT Received: from hu-qqzhou-sha.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 10 Oct 2024 23:31:49 -0700 From: Qingqing Zhou To: , , , , , , , , , CC: , , , , Qingqing Zhou Subject: [PATCH 3/4] arm64: dts: qcom: qcs615: add scm node Date: Fri, 11 Oct 2024 12:01:11 +0530 Message-ID: <20241011063112.19087-4-quic_qqzhou@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241011063112.19087-1-quic_qqzhou@quicinc.com> References: <20241011063112.19087-1-quic_qqzhou@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Pz8rCc4xKgpJbRc8PIs8XcOqLOCHl-J7 X-Proofpoint-ORIG-GUID: Pz8rCc4xKgpJbRc8PIs8XcOqLOCHl-J7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 mlxlogscore=999 bulkscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 phishscore=0 priorityscore=1501 clxscore=1015 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410110042 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the scm node for QCS615 platform. It is an interface to communicate to the secure firmware. Signed-off-by: Qingqing Zhou --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qco= m/qcs615.dtsi index ac4c4c751da1..027c5125f36b 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -278,6 +278,13 @@ reg =3D <0 0x80000000 0 0>; }; =20 + firmware { + scm { + compatible =3D "qcom,scm-qcs615", "qcom,scm"; + qcom,dload-mode =3D <&tcsr 0x13000>; + }; + }; + camnoc_virt: interconnect-0 { compatible =3D "qcom,qcs615-camnoc-virt"; #interconnect-cells =3D <2>; --=20 2.17.1 From nobody Wed Nov 27 09:48:22 2024 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F71D20A5CA; Fri, 11 Oct 2024 06:32:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Add the APPS SMMU node for qcs615-based platforms. Add the dma-ranges to limit DMA address range to 36bit width to align with system architecture. Signed-off-by: Qingqing Zhou --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 74 ++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qco= m/qcs615.dtsi index 027c5125f36b..fcba83fca7cf 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -379,6 +379,7 @@ soc: soc@0 { compatible =3D "simple-bus"; ranges =3D <0 0 0 0 0x10 0>; + dma-ranges =3D <0 0 0 0 0x10 0>; #address-cells =3D <2>; #size-cells =3D <2>; =20 @@ -524,6 +525,79 @@ reg =3D <0x0 0x0c3f0000 0x0 0x400>; }; =20 + apps_smmu: iommu@15000000 { + compatible =3D "qcom,qcs615-smmu-500", "qcom,smmu-500", "arm,mmu-500"; + reg =3D <0x0 0x15000000 0x0 0x80000>; + #iommu-cells =3D <2>; + #global-interrupts =3D <1>; + + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + intc: interrupt-controller@17a00000 { compatible =3D "arm,gic-v3"; reg =3D <0x0 0x17a00000 0x0 0x10000>, /* GICD */ --=20 2.17.1