From nobody Wed Nov 27 08:40:56 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A77711D0795; Fri, 11 Oct 2024 18:50:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728672612; cv=none; b=ecoDVnGqihcz0WdDSIUiYgiU+fmnjS0Lhv5lDGnDcsjHzRB5cOdHul5LDCrQpiFxsHAoVCfwY228JGSJxcaFBqB7igzsLAy1mDJfHRBpGSloPYy1PmqincHg2N2qwa4VkClzqxfql0gdrT2QT86dyh8RP3MTfo2HCQ+w9Y6FR5Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728672612; c=relaxed/simple; bh=Vvsn+FfMu8gHfnPPHlqOlCcW7zooQV4FQdRvz2fIpDk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pXHPtRPQ5S8NIglN5813wu0SUAE8WlSKu3M7YkEHfpZxdRgAZusC+HDmmW9tNW4/gP2ysFGEH/CyN6WrcohUKsUR9h9JeYe8BwU9xXRrwA0RYPH1HI1542yh4u26bOVsK8f2bP4OJ/iZulKD4NEoD5iXqiDjpMDWets0Yrj5Jtw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SRhNu6XH; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SRhNu6XH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728672610; x=1760208610; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=Vvsn+FfMu8gHfnPPHlqOlCcW7zooQV4FQdRvz2fIpDk=; b=SRhNu6XH4bO+FmjLp5ARpWVBcw2rdiLuYhs6TtNaJgHVaDPPcsZ7vrGi erbpOdETLjptcrzEesXTMITXsWfDePLQKd3tLtUZEVFnZAFh+SBT+2TS6 gv3MhtbOs3zNKCPAklF0thEy3iN/BHh+ZL1erkmaUdmqNLqgRv2L97Ko2 3tIzqJ3yAQ2i7jcGV+X4JHAV+y7F8Tzl1zZp+X9ItstfOdSCuzIs192XR HtStYeygx9tW0AIzor7sCeKVeV3sdIe44bk6ZpXF6ZRuHzUQKcYnWxmpb 5kINEh1opx5BCPgL2TDj5kGpT5uWngnjeXgygI2JbQTQ22SA/xLRleIDZ w==; X-CSE-ConnectionGUID: eTwPvcXNQaCc2lDcygcMVw== X-CSE-MsgGUID: yvYXsyZTTqWeOx1HGPHXdw== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="50626175" X-IronPort-AV: E=Sophos;i="6.11,196,1725346800"; d="scan'208";a="50626175" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 11:50:07 -0700 X-CSE-ConnectionGUID: 0yARSm44RbaQg781JuBftw== X-CSE-MsgGUID: qG87DAHYSfu20lXptcEYbg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,196,1725346800"; d="scan'208";a="77804163" Received: from jekeller-desk.jf.intel.com ([10.166.241.20]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 11:50:06 -0700 From: Jacob Keller Date: Fri, 11 Oct 2024 11:48:34 -0700 Subject: [PATCH net-next 6/8] ice: reduce size of queue context fields Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241011-packing-pack-fields-and-ice-implementation-v1-6-d9b1f7500740@intel.com> References: <20241011-packing-pack-fields-and-ice-implementation-v1-0-d9b1f7500740@intel.com> In-Reply-To: <20241011-packing-pack-fields-and-ice-implementation-v1-0-d9b1f7500740@intel.com> To: Vladimir Oltean , Andrew Morton , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Tony Nguyen , Przemek Kitszel Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Jacob Keller X-Mailer: b4 0.14.1 The ice_rlan_ctx and ice_tlan_ctx structures have some fields which are intentionally sized larger necessary relative to the packed sizes the data must fit into. This was done because the original ice_set_ctx() function and its helpers did not correctly handle packing when the packed bits straddled a byte. This is no longer the case with the use of the implementation. Save some bytes in these structures by sizing the variables to the number of bytes the actual bitpacked fields fit into. There are a couple of gaps left in the structure, which is a result of the fields being in the order they appear in the packed bit layout, but where alignment forces some extra gaps. We could fix this, saving ~8 bytes from each structure. However, these structures are not used heavily, and the resulting savings is minimal: $ bloat-o-meter ice-before-reorder.ko ice-after-reorder.ko add/remove: 0/0 grow/shrink: 1/1 up/down: 26/-70 (-44) Function old new delta ice_vsi_cfg_txq 1873 1899 +26 ice_setup_rx_ctx.constprop 1529 1459 -70 Total: Before=3D1459555, After=3D1459511, chg -0.00% Thus, the fields are left in the same order as the packed bit layout, despite the gaps this causes. Signed-off-by: Jacob Keller Reviewed-by: Przemek Kitszel --- drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h | 32 ++++++++--------------= ---- 1 file changed, 10 insertions(+), 22 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h b/drivers/net/e= thernet/intel/ice/ice_lan_tx_rx.h index 6c83e9d71c64..618cc39bd397 100644 --- a/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h +++ b/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h @@ -377,23 +377,17 @@ enum ice_rx_flex_desc_status_error_1_bits { #define ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS 5 #define GLTCLAN_CQ_CNTX(i, CQ) (GLTCLAN_CQ_CNTX0(CQ) + ((i) * 0x0800)) =20 -/* RLAN Rx queue context data - * - * The sizes of the variables may be larger than needed due to crossing by= te - * boundaries. If we do not have the width of the variable set to the corr= ect - * size then we could end up shifting bits off the top of the variable whe= n the - * variable is at the top of a byte and crosses over into the next byte. - */ +/* RLAN Rx queue context data */ struct ice_rlan_ctx { u16 head; - u16 cpuid; /* bigger than needed, see above for reason */ + u8 cpuid; #define ICE_RLAN_BASE_S 7 u64 base; u16 qlen; #define ICE_RLAN_CTX_DBUF_S 7 - u16 dbuf; /* bigger than needed, see above for reason */ + u8 dbuf; #define ICE_RLAN_CTX_HBUF_S 6 - u16 hbuf; /* bigger than needed, see above for reason */ + u8 hbuf; u8 dtype; u8 dsize; u8 crcstrip; @@ -401,12 +395,12 @@ struct ice_rlan_ctx { u8 hsplit_0; u8 hsplit_1; u8 showiv; - u32 rxmax; /* bigger than needed, see above for reason */ + u16 rxmax; u8 tphrdesc_ena; u8 tphwdesc_ena; u8 tphdata_ena; u8 tphhead_ena; - u16 lrxqthresh; /* bigger than needed, see above for reason */ + u8 lrxqthresh; u8 prefena; /* NOTE: normally must be set to 1 at init */ }; =20 @@ -539,18 +533,12 @@ enum ice_tx_ctx_desc_eipt_offload { =20 #define ICE_TXQ_CTX_SZ 22 =20 -/* Tx queue context data - * - * The sizes of the variables may be larger than needed due to crossing by= te - * boundaries. If we do not have the width of the variable set to the corr= ect - * size then we could end up shifting bits off the top of the variable whe= n the - * variable is at the top of a byte and crosses over into the next byte. - */ +/* Tx queue context data */ struct ice_tlan_ctx { #define ICE_TLAN_CTX_BASE_S 7 u64 base; /* base is defined in 128-byte units */ u8 port_num; - u16 cgd_num; /* bigger than needed, see above for reason */ + u8 cgd_num; u8 pf_num; u16 vmvf_num; u8 vmvf_type; @@ -561,7 +549,7 @@ struct ice_tlan_ctx { u8 tsyn_ena; u8 internal_usage_flag; u8 alt_vlan; - u16 cpuid; /* bigger than needed, see above for reason */ + u8 cpuid; u8 wb_mode; u8 tphrd_desc; u8 tphrd; @@ -570,7 +558,7 @@ struct ice_tlan_ctx { u16 qnum_in_func; u8 itr_notification_mode; u8 adjust_prof_id; - u32 qlen; /* bigger than needed, see above for reason */ + u16 qlen; u8 quanta_prof_idx; u8 tso_ena; u16 tso_qnum; --=20 2.47.0.265.g4ca455297942