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When `bad_data_bit` is less than 32, `bad_data_bit - 32` becomes negative, and left-shifting by a negative value in C is undefined behavior. Fix this by checking the range of `bad_data_bit` before performing the shift. Fixes: ea2eb9a8b620 ("EDAC, fsl-ddr: Separate FSL DDR driver from MPC85xx") Signed-off-by: Priyanka Singh Reviewed-by: Sherry Sun Signed-off-by: Li Yang Signed-off-by: Frank Li --- drivers/edac/fsl_ddr_edac.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/edac/fsl_ddr_edac.c b/drivers/edac/fsl_ddr_edac.c index 7a9fb1202f1a0..ccc13c2adfd6f 100644 --- a/drivers/edac/fsl_ddr_edac.c +++ b/drivers/edac/fsl_ddr_edac.c @@ -338,11 +338,18 @@ static void fsl_mc_check(struct mem_ctl_info *mci) fsl_mc_printk(mci, KERN_ERR, "Faulty ECC bit: %d\n", bad_ecc_bit); =20 - fsl_mc_printk(mci, KERN_ERR, - "Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n", - cap_high ^ (1 << (bad_data_bit - 32)), - cap_low ^ (1 << bad_data_bit), - syndrome ^ (1 << bad_ecc_bit)); + if ((bad_data_bit > 0 && bad_data_bit < 32) && bad_ecc_bit > 0) { + fsl_mc_printk(mci, KERN_ERR, + "Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n", + cap_high, cap_low ^ (1 << bad_data_bit), + syndrome ^ (1 << bad_ecc_bit)); + } + if (bad_data_bit >=3D 32 && bad_ecc_bit > 0) { + fsl_mc_printk(mci, KERN_ERR, + "Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n", + cap_high ^ (1 << (bad_data_bit - 32)), + cap_low, syndrome ^ (1 << bad_ecc_bit)); + } } =20 fsl_mc_printk(mci, KERN_ERR, --=20 2.34.1