From nobody Wed Nov 27 10:28:36 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 167D31C9EB9; Thu, 10 Oct 2024 13:40:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728567614; cv=none; b=huvcw1hlrREusaquoMPhJUi3DWBJd11adSDi02cq2lGlY7V4T15Cj10+PfDX87NXiMHdJOfe7H2rs/I5yfNU1yr4ZwExuoEWGQKeTrsLHudH7ofT3Scskkd9ZB3JDZgyAHJQon1FEyR5OQbWCy660SrGwFDreFw4A+sIXxfg/Cc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728567614; c=relaxed/simple; bh=oNq5n3k+uHSQU0ZTV0v6QtwqnkLk4h+7tyka8HePvOA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hFExjF1vicehARvYhYeo6AON7ksuYcAIV67uFVfLJ5ZgasZR9V3j/pRXLzh/XqKDehNwuuBeYNriIdPDoYQsV8D2HblYIIuKiGVueuVpU1lUsDM8umEX6ntNsM5rr3ICNiRip8O8zhkGea2BBqwz6a9gBksuLNW5XH1Y5LQpq/0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nEO9Ev/Y; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nEO9Ev/Y" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728567613; x=1760103613; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oNq5n3k+uHSQU0ZTV0v6QtwqnkLk4h+7tyka8HePvOA=; b=nEO9Ev/Yx3rXxXHpB+okB3xeCjZQQpP0mLlT/g6GihvaqQUKaUR+yF72 DVxtGQzxN9fb6jLlBOb80bdqv8zplnwvXi4Y0TMdQFLAQOxaGle2GNciS fnvpyVIv1wFSjv/CzG0/m/0AkgnvU9JBqPW83S//zSebwJocHn4hgxNLN WsvB1sr/ipsDia4H8Hs8ENLbVWB3ITgFxeHZxbEEOXpVsY8oSuPdUNY37 4fQkhV2zSfQDOSwXFJ/tQl8OBkXazNv60rXpdLx5gnmNkjD1T1Z7vtTKj vHxuMDTzg8D54FwBGOItYg+IGYbPGWjPVwByUUJ+bNE9w9pifmJVYgVAA A==; X-CSE-ConnectionGUID: JdmHMXVVRL24UV/xUQl1Ew== X-CSE-MsgGUID: jJELuzu+QB2B+6F5C02wlA== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="31718277" X-IronPort-AV: E=Sophos;i="6.11,193,1725346800"; d="scan'208";a="31718277" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2024 06:40:13 -0700 X-CSE-ConnectionGUID: Ebh9qc76ShK+sZ0lbDF+PQ== X-CSE-MsgGUID: xA2GXhqwTWKybUnwtCOxqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,193,1725346800"; d="scan'208";a="81114922" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO localhost.localdomain) ([10.245.245.12]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2024 06:40:09 -0700 From: Patryk Wlazlyn To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, rafael.j.wysocki@intel.com, len.brown@intel.com, artem.bityutskiy@linux.intel.com, dave.hansen@linux.intel.com, patryk.wlazlyn@linux.intel.com Subject: [PATCH 1/3] x86/smp: Move mwait hint computation out of mwait_play_dead Date: Thu, 10 Oct 2024 15:39:53 +0200 Message-ID: <20241010133955.7749-2-patryk.wlazlyn@linux.intel.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241010133955.7749-1-patryk.wlazlyn@linux.intel.com> References: <20241010133955.7749-1-patryk.wlazlyn@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The following patches will provide a way for idle driver to set the mwait hint for offline code to use to reach the deepest cstate. Make the following changes simpler by moving the mwait hint computation to a separate function. Signed-off-by: Patryk Wlazlyn --- arch/x86/kernel/smpboot.c | 44 ++++++++++++++++++++++++--------------- 1 file changed, 27 insertions(+), 17 deletions(-) diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 0c35207320cb..683898e3b20e 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1270,28 +1270,14 @@ void play_dead_common(void) local_irq_disable(); } =20 -/* - * We need to flush the caches before going to sleep, lest we have - * dirty data in our caches when we come back up. - */ -static inline void mwait_play_dead(void) +/* Computes mwait hint for the deepest mwait hint based on cpuid leaf 0x5 = */ +static inline unsigned int get_deepest_mwait_hint(void) { - struct mwait_cpu_dead *md =3D this_cpu_ptr(&mwait_cpu_dead); unsigned int eax, ebx, ecx, edx; unsigned int highest_cstate =3D 0; unsigned int highest_subcstate =3D 0; int i; =20 - if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD || - boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) - return; - if (!this_cpu_has(X86_FEATURE_MWAIT)) - return; - if (!this_cpu_has(X86_FEATURE_CLFLUSH)) - return; - if (__this_cpu_read(cpu_info.cpuid_level) < CPUID_MWAIT_LEAF) - return; - eax =3D CPUID_MWAIT_LEAF; ecx =3D 0; native_cpuid(&eax, &ebx, &ecx, &edx); @@ -1314,6 +1300,30 @@ static inline void mwait_play_dead(void) (highest_subcstate - 1); } =20 + return eax; +} + +/* + * We need to flush the caches before going to sleep, lest we have + * dirty data in our caches when we come back up. + */ +static inline void mwait_play_dead(void) +{ + struct mwait_cpu_dead *md =3D this_cpu_ptr(&mwait_cpu_dead); + unsigned int hint; + + if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD || + boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) + return; + if (!this_cpu_has(X86_FEATURE_MWAIT)) + return; + if (!this_cpu_has(X86_FEATURE_CLFLUSH)) + return; + if (__this_cpu_read(cpu_info.cpuid_level) < CPUID_MWAIT_LEAF) + return; + + hint =3D get_deepest_mwait_hint(); + /* Set up state for the kexec() hack below */ md->status =3D CPUDEAD_MWAIT_WAIT; md->control =3D CPUDEAD_MWAIT_WAIT; @@ -1333,7 +1343,7 @@ static inline void mwait_play_dead(void) mb(); __monitor(md, 0, 0); mb(); - __mwait(eax, 0); + __mwait(hint, 0); =20 if (READ_ONCE(md->control) =3D=3D CPUDEAD_MWAIT_KEXEC_HLT) { /* --=20 2.46.2 From nobody Wed Nov 27 10:28:36 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65FD51CC14D; Thu, 10 Oct 2024 13:40:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728567618; cv=none; b=LAtVu2BoD6NCnbSO57vSv96B5t1za/CYh+NMFtjRNfsW3bIF2UO6bfMpI0rkXZh+qIjhBi02qnRq/TaU+8TL+9tYyLVfgxr6IHc1D1Ax7yWm5gEChdiuRqmAivpJ5qSONQLYGAX1IlW0zSZ5lvLHLGiCGkNJZth2Lb6kaSAW64U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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d="scan'208";a="81114926" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO localhost.localdomain) ([10.245.245.12]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2024 06:40:13 -0700 From: Patryk Wlazlyn To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, rafael.j.wysocki@intel.com, len.brown@intel.com, artem.bityutskiy@linux.intel.com, dave.hansen@linux.intel.com, patryk.wlazlyn@linux.intel.com Subject: [PATCH 2/3] x86/smp: Allow forcing the mwait hint for play dead loop Date: Thu, 10 Oct 2024 15:39:54 +0200 Message-ID: <20241010133955.7749-3-patryk.wlazlyn@linux.intel.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241010133955.7749-1-patryk.wlazlyn@linux.intel.com> References: <20241010133955.7749-1-patryk.wlazlyn@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The current implementation for looking up the mwait hint for the deepest cstate depends on them to be continuous in range [0, NUM_SUBSTATES-1]. While that is correct on most Intel x86 platforms, it is not architectural and may not result in reaching the most optimized idle state on some of them. For example Intel's Sierra Forest report two C6 substates in cpuid leaf 5: C6S (hint 0x22) C6SP (hint 0x23) Hints 0x20 and 0x21 are skipped entirely, causing the current implementation to compute the wrong hint, when looking for the deepest cstate for offlined CPU to enter. As a result, package with an offlined CPU can never reach PC6. Allow the idle driver to communicate the deepest idle cstate to the x86 offline code. Signed-off-by: Patryk Wlazlyn --- arch/x86/include/asm/smp.h | 3 +++ arch/x86/kernel/smpboot.c | 12 +++++++++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h index ca073f40698f..2cb083a84225 100644 --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -114,6 +114,7 @@ void wbinvd_on_cpu(int cpu); int wbinvd_on_all_cpus(void); =20 void smp_kick_mwait_play_dead(void); +void smp_set_mwait_play_dead_hint(unsigned int hint); =20 void native_smp_send_reschedule(int cpu); void native_send_call_func_ipi(const struct cpumask *mask); @@ -164,6 +165,8 @@ static inline struct cpumask *cpu_llc_shared_mask(int c= pu) { return (struct cpumask *)cpumask_of(0); } + +static inline void smp_set_mwait_play_dead_hint(unsigned int hint) { } #endif /* CONFIG_SMP */ =20 #ifdef CONFIG_DEBUG_NMI_SELFTEST diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 683898e3b20e..67d1fc976683 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -127,6 +127,9 @@ int __read_mostly __max_smt_threads =3D 1; /* Flag to indicate if a complete sched domain rebuild is required */ bool x86_topology_update; =20 +#define PLAY_DEAD_MWAIT_HINT_UNSET 0U +static unsigned int __read_mostly play_dead_mwait_hint =3D PLAY_DEAD_MWAIT= _HINT_UNSET; + int arch_update_cpu_topology(void) { int retval =3D x86_topology_update; @@ -1270,6 +1273,11 @@ void play_dead_common(void) local_irq_disable(); } =20 +void smp_set_mwait_play_dead_hint(unsigned int hint) +{ + WRITE_ONCE(play_dead_mwait_hint, hint); +} + /* Computes mwait hint for the deepest mwait hint based on cpuid leaf 0x5 = */ static inline unsigned int get_deepest_mwait_hint(void) { @@ -1322,7 +1330,9 @@ static inline void mwait_play_dead(void) if (__this_cpu_read(cpu_info.cpuid_level) < CPUID_MWAIT_LEAF) return; =20 - hint =3D get_deepest_mwait_hint(); + hint =3D READ_ONCE(play_dead_mwait_hint); + if (hint =3D=3D PLAY_DEAD_MWAIT_HINT_UNSET) + hint =3D get_deepest_mwait_hint(); =20 /* Set up state for the kexec() hack below */ md->status =3D CPUDEAD_MWAIT_WAIT; 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X-CSE-ConnectionGUID: 2PpAgoCcTJeFa9mfKn+G7Q== X-CSE-MsgGUID: Vi9Lo3ByRxaYKMB3x/zJ6g== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="31718286" X-IronPort-AV: E=Sophos;i="6.11,193,1725346800"; d="scan'208";a="31718286" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2024 06:40:20 -0700 X-CSE-ConnectionGUID: VSbU31+FQhq7B+wX5SMroA== X-CSE-MsgGUID: 0O/cs4lwQYmOVw/cwvQrcw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,193,1725346800"; d="scan'208";a="81114934" Received: from oandoniu-mobl3.ger.corp.intel.com (HELO localhost.localdomain) ([10.245.245.12]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2024 06:40:16 -0700 From: Patryk Wlazlyn To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, rafael.j.wysocki@intel.com, len.brown@intel.com, artem.bityutskiy@linux.intel.com, dave.hansen@linux.intel.com, patryk.wlazlyn@linux.intel.com Subject: [PATCH 3/3] intel_idle: Identify the deepest cstate for cpu offline code Date: Thu, 10 Oct 2024 15:39:55 +0200 Message-ID: <20241010133955.7749-4-patryk.wlazlyn@linux.intel.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241010133955.7749-1-patryk.wlazlyn@linux.intel.com> References: <20241010133955.7749-1-patryk.wlazlyn@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On some platforms, for example Sierra Forest, the mwait hints for subsequent idle states are not continuous, resulting in play_dead() code not computing the most optimized idle state when CPU is put offline. This in turn prevents from entering PC6 state when any of the CPUs in the package is offline. Force the known, best mwait hint for the deepest cstate. Signed-off-by: Patryk Wlazlyn --- drivers/idle/intel_idle.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 9aab7abc2ae9..d0b4b231d9ad 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -48,6 +48,7 @@ #include #include #include +#include #include #include #include @@ -1645,6 +1646,7 @@ static bool __init intel_idle_acpi_cst_extract(void) static void __init intel_idle_init_cstates_acpi(struct cpuidle_driver *drv) { int cstate, limit =3D min_t(int, CPUIDLE_STATE_MAX, acpi_state_table.coun= t); + unsigned int mwait_hint_deepest =3D 0; =20 /* * If limit > 0, intel_idle_cst_usable() has returned 'true', so all of @@ -1678,6 +1680,7 @@ static void __init intel_idle_init_cstates_acpi(struc= t cpuidle_driver *drv) state->target_residency *=3D 3; =20 state->flags =3D MWAIT2flg(cx->address); + mwait_hint_deepest =3D cx->address; if (cx->type > ACPI_STATE_C2) state->flags |=3D CPUIDLE_FLAG_TLB_FLUSHED; =20 @@ -1690,6 +1693,9 @@ static void __init intel_idle_init_cstates_acpi(struc= t cpuidle_driver *drv) state->enter =3D intel_idle; state->enter_s2idle =3D intel_idle_s2idle; } + + if (mwait_hint_deepest) + smp_set_mwait_play_dead_hint(mwait_hint_deepest); } =20 static bool __init intel_idle_off_by_default(u32 mwait_hint) @@ -1988,6 +1994,7 @@ static void state_update_enter_method(struct cpuidle_= state *state, int cstate) =20 static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv) { + unsigned int mwait_hint_deepest =3D 0; int cstate; =20 switch (boot_cpu_data.x86_vfm) { @@ -2037,6 +2044,8 @@ static void __init intel_idle_init_cstates_icpu(struc= t cpuidle_driver *drv) if (!intel_idle_verify_cstate(mwait_hint)) continue; =20 + mwait_hint_deepest =3D mwait_hint; + /* Structure copy. */ drv->states[drv->state_count] =3D cpuidle_state_table[cstate]; state =3D &drv->states[drv->state_count]; @@ -2060,6 +2069,9 @@ static void __init intel_idle_init_cstates_icpu(struc= t cpuidle_driver *drv) wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0); wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0); } + + if (mwait_hint_deepest) + smp_set_mwait_play_dead_hint(mwait_hint_deepest); } =20 /** --=20 2.46.2