From nobody Wed Nov 27 10:39:42 2024 Received: from mail.andi.de1.cc (mail.andi.de1.cc [178.238.236.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 771811C5799; Thu, 10 Oct 2024 12:30:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.238.236.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563409; cv=none; b=huAzveHWMX/GApN6q6D07iSf3pu8JusT6Jhrw1DhN2/pVOHthMIHBXjDZTEY9KJVqTjnVc0xGKZvcMb4lOIlTrqTxx0038gVqj5uQ9rd2PISg2XCLXFaL50CLaYLk61q29TfPJBFzU2mLIfZKQ1eUdkn2SZIFdTYRuuujkjG6CE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563409; c=relaxed/simple; bh=B8fBtw305FZ4bKF6UrPP7Qui5fyzO9uQMcfpLl+pKvc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=X4aIQ6ghCy2yGzwKedzY9JjOUj//O3ikPQBwPvuqhsSUpgCS6KIyXBAOiR9EjEMBIBzU3DuK9040SOxdu7fzlMERHpS/4kAhcpjWrWugsq74sWRYrV6Mj9lFnUsTrsxTWQjhlV7i8nIAYZsMfQuDwlMosJnvXcNJOhLugNSD14E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kemnade.info; spf=pass smtp.mailfrom=kemnade.info; dkim=pass (2048-bit key) header.d=kemnade.info header.i=@kemnade.info header.b=lUGmQmAJ; arc=none smtp.client-ip=178.238.236.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kemnade.info Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=kemnade.info Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kemnade.info header.i=@kemnade.info header.b="lUGmQmAJ" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kemnade.info; s=20220719; h=References:In-Reply-To:Cc:From:Sender:Reply-To: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=tkFhd0O+ezIO8vzMqk6aqFHquXcWm43ot+D5UbEr0e4=; b=lUGmQmAJbspwzLAxoqhqKwiBJx xHnbQamD1eVeaFdBWQKx1YBnp3JE2QRafTbPQK+0x5ZbNbNiLfYiNJ+S6HmEqnPOChBXlw9rjh/z4 0QfXZZZt8wQ/cah22Chizu47YK5FCm+4+PEn6R5dWpyFo3tWw6ZIxrZB0M+rtzM4xZgHHRGahcRLA 4bDqjxEDTrnFyHQc9X7j4OD8pC394nqYUzoPyDWtECJpB6Wj8anQrYj4MnI6IODAiY61Z7K0bef2x FPwu+2RQ2Bocot4xjpeYvpIG3PS/QDOvXDLZlQiwr/9Z9cIC6CAhsUOeGyvi9byGa4jEhtypPCqdQ RmBVwQjA==; From: Andreas Kemnade To: linux-kernel@vger.kernel.org, Rob Herring , rogerq@kernel.org, linux-omap@vger.kernel.org, Krzysztof Kozlowski , tony@atomide.com, devicetree@vger.kernel.org, khilman@baylibre.com, Conor Dooley , aaro.koskinen@iki.fi Cc: Andreas Kemnade Subject: [PATCH v2 1/4] ARM: dts: omap: omap4-epson-embt2ws: define GPIO regulators Date: Thu, 10 Oct 2024 14:29:54 +0200 Message-Id: <20241010122957.85164-2-andreas@kemnade.info> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241010122957.85164-1-andreas@kemnade.info> References: <20241010122957.85164-1-andreas@kemnade.info> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To properly have things running after cold boot, define GPIO regulators. Naming is based on board file. In the vendor kernel they are enabled in a function called bt2ws_dcdc_init() if the system is not booted just to charge the battery. Signed-off-by: Andreas Kemnade Reviewed-by: Roger Quadros --- .../boot/dts/ti/omap/omap4-epson-embt2ws.dts | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts b/arch/arm/b= oot/dts/ti/omap/omap4-epson-embt2ws.dts index 339e52ba3614..4462747b5cf5 100644 --- a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts +++ b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts @@ -46,6 +46,55 @@ key-lock { }; }; =20 + cb_v18: regulator-cb-v18 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cb_v18_pins>; + compatible =3D "regulator-fixed"; + regulator-name =3D "cb_v18"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + gpio =3D <&gpio1 28 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + cb_v33: regulator-cb-v33 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cb_v33_pins>; + compatible =3D "regulator-fixed"; + regulator-name =3D "cb_v33"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + gpio =3D <&gpio6 30 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + regulator-cb-v50 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cb_v50_pins>; + compatible =3D "regulator-fixed"; + regulator-name =3D "cb_v50"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-always-on; + gpio =3D <&gpio6 31 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + lb_v50: regulator-lb-v50 { + /* required for many things at the head (probably indirectly) */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lb_v50_pins>; + compatible =3D "regulator-fixed"; + regulator-name =3D "lb_v50"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-always-on; + gpio =3D <&gpio1 27 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + unknown_supply: unknown-supply { compatible =3D "regulator-fixed"; regulator-name =3D "unknown"; @@ -336,6 +385,24 @@ OMAP4_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE3) /* gpio25 */ >; }; =20 + cb_v18_pins: pinmux-cb-v18-pins { + pinctrl-single,pins =3D < + OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE3) /* gpio28 */ + >; + }; + + cb_v33_pins: pinmux-cb-v33-pins { + pinctrl-single,pins =3D < + OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE3) /* gpio190 */ + >; + }; + + cb_v50_pins: pinmux-cb-v50-pins { + pinctrl-single,pins =3D < + OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE3) /* gpio191 */ + >; + }; + gpio_keys_pins: pinmux-gpio-key-pins { pinctrl-single,pins =3D < OMAP4_IOPAD(0x56, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio35 */ @@ -387,6 +454,12 @@ OMAP4_IOPAD(0x005c, PIN_OUTPUT | MUX_MODE1) >; }; =20 + lb_v50_pins: pinmux-lb-v50-pins { + pinctrl-single,pins =3D < + OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE3) /* gpio27 */ + >; + }; + mcbsp2_pins: pinmux-mcbsp2-pins { pinctrl-single,pins =3D < OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */ --=20 2.39.5 From nobody Wed Nov 27 10:39:42 2024 Received: from mail.andi.de1.cc (mail.andi.de1.cc [178.238.236.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4F9A1C57A0; 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From: Andreas Kemnade To: linux-kernel@vger.kernel.org, Rob Herring , rogerq@kernel.org, linux-omap@vger.kernel.org, Krzysztof Kozlowski , tony@atomide.com, devicetree@vger.kernel.org, khilman@baylibre.com, Conor Dooley , aaro.koskinen@iki.fi Cc: Andreas Kemnade Subject: [PATCH v2 2/4] ARM: dts: omap: omap4-epson-embt2ws: wire up regulators Date: Thu, 10 Oct 2024 14:29:55 +0200 Message-Id: <20241010122957.85164-3-andreas@kemnade.info> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241010122957.85164-1-andreas@kemnade.info> References: <20241010122957.85164-1-andreas@kemnade.info> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Wire up the regulators where usage is plausible. Do not wire them if purpose/usage is unclear like 5V for many things requiring lower voltages. Tested on vendor kernel that backlight definitively does not react on blc_[rl] GPIOs. Signed-off-by: Andreas Kemnade Reviewed-by: Roger Quadros --- arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts b/arch/arm/b= oot/dts/ti/omap/omap4-epson-embt2ws.dts index 4462747b5cf5..7684868a2eed 100644 --- a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts +++ b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts @@ -20,13 +20,13 @@ memory@80000000 { backlight-left { compatible =3D "pwm-backlight"; pwms =3D <&twl_pwm 1 7812500>; - power-supply =3D <&unknown_supply>; + power-supply =3D <&lb_v50>; }; =20 backlight-right { compatible =3D "pwm-backlight"; pwms =3D <&twl_pwm 0 7812500>; - power-supply =3D <&unknown_supply>; + power-supply =3D <&lb_v50>; }; =20 chosen { @@ -95,11 +95,6 @@ lb_v50: regulator-lb-v50 { enable-active-high; }; =20 - unknown_supply: unknown-supply { - compatible =3D "regulator-fixed"; - regulator-name =3D "unknown"; - }; - wl12xx_pwrseq: wl12xx-pwrseq { compatible =3D "mmc-pwrseq-simple"; clocks =3D <&twl 1>; @@ -308,6 +303,8 @@ mpu9150: imu@68 { pinctrl-0 =3D <&mpu9150_pins>; interrupt-parent =3D <&gpio2>; interrupt =3D <7 IRQ_TYPE_LEVEL_HIGH>; + vddio-supply =3D <&cb_v18>; + vdd-supply =3D <&cb_v33>; invensense,level-shifter; }; }; --=20 2.39.5 From nobody Wed Nov 27 10:39:42 2024 Received: from mail.andi.de1.cc (mail.andi.de1.cc [178.238.236.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4FE61C57AD; Thu, 10 Oct 2024 12:30:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.238.236.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563408; cv=none; b=Ayjq5Ptkj7T7USSNoLNT696QtUCWcorY37MaXGNv3gXArcJYhCay9lCHgOgE03iguSyFtxbNXhd/pU+0LXWZoekmZ+ZHxjGs/E0Kz3Y6DtshD7hS4JX2b2A0HU9aWhKztN50a+5tkG5HZWgDPv0uxxdcoVGPmRXS3jRoyaaenuw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563408; c=relaxed/simple; bh=zIsf5wBtJEcRsHHarX8fdw1tTc6HKm1kV19ptcg4D9Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jZoA91nI8YUPmR8S639beGQJkpw1VDGTcsqCG2VNvrsjN5w9bvLBFkfUsz5+nBcVWjXVgWFAZ2hna/SsKl9P/CDlYZnX+H2bD296vjYqgKadTLS8+g5FHh60qf53cEaOrjZp57V8XZJZS+VaNE+Nnv5ehwDg/gnrEExzXjDa6Jo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kemnade.info; spf=pass smtp.mailfrom=kemnade.info; dkim=pass (2048-bit key) header.d=kemnade.info header.i=@kemnade.info header.b=fUk3Cqs1; arc=none smtp.client-ip=178.238.236.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kemnade.info Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=kemnade.info Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kemnade.info header.i=@kemnade.info header.b="fUk3Cqs1" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kemnade.info; s=20220719; h=References:In-Reply-To:Cc:From:Sender:Reply-To: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=WoXNrrK9utFPkWsdOWLdvgndBfH4FnI9f6ttIiYO7Ak=; b=fUk3Cqs1KxESUYV7zjgtIZB6Dh +dA7v7GzQs/XUosn4FMTR6RcoNPK1CUB9e74ygLHZCieulg15ItbogQbPfm2ABIIKAn1/sgkLQAoY oFugY2yNP1WCb/qnuV2L5JcuA6l41Afvkvrh8mlk23UzU0en8ARXYPSC6rb9t3hMU4GF4s5V8V3si iG1aNugVvikqSeVbVwEx3hQfrT1zc3smn4YDOWg2Z2U7FwllmCA2Ey04eH8fBhUF8oQPvZDxcamXR TjaVgVWc34AEDAibtqAplEVt9mB/egnFfuuuxca+iACsaETID2uUNGGFrPmObO6gOcM4TfEjop4EG Aunv/o3Q==; From: Andreas Kemnade To: linux-kernel@vger.kernel.org, Rob Herring , rogerq@kernel.org, linux-omap@vger.kernel.org, Krzysztof Kozlowski , tony@atomide.com, devicetree@vger.kernel.org, khilman@baylibre.com, Conor Dooley , aaro.koskinen@iki.fi Cc: Andreas Kemnade Subject: [PATCH v2 3/4] ARM: dts: omap: omap4-epson-embt2ws: add unknown gpio outputs Date: Thu, 10 Oct 2024 14:29:56 +0200 Message-Id: <20241010122957.85164-4-andreas@kemnade.info> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241010122957.85164-1-andreas@kemnade.info> References: <20241010122957.85164-1-andreas@kemnade.info> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Set them to the state seen in a running system, initialized by vendor u-boot or kernel. Add line names where they are defined in the vendor kernel. gpio15 resets something in the display, otherwise meaning of the gpios is not known. Signed-off-by: Andreas Kemnade Reviewed-by: Roger Quadros --- .../boot/dts/ti/omap/omap4-epson-embt2ws.dts | 92 +++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts b/arch/arm/b= oot/dts/ti/omap/omap4-epson-embt2ws.dts index 7684868a2eed..983a21d95db3 100644 --- a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts +++ b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts @@ -115,6 +115,73 @@ wl12xx_vmmc: wl12xx-vmmc { }; }; =20 +&gpio1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpio1_hog_pins &gpio1wk_hog_pins>; + + lb-reset-hog { + gpio-hog; + gpios =3D <9 GPIO_ACTIVE_HIGH>; + output-low; + line-name =3D "lb_reset"; + }; + + power-en-hog { + gpio-hog; + gpios =3D <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "power_en"; + }; + + /* + * Name taken from vendor kernel but no evidence of actual usage found + * nor what it really controls. + */ + panel-power-en-hog { + gpio-hog; + gpios =3D <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name =3D "panel_power_en"; + }; + + /* + * These two are exported to sysfs in vendor kernel, usage unknown, + * backlight state seems unrelated to these. + */ + blc-r-hog { + gpio-hog; + gpios =3D <17 GPIO_ACTIVE_HIGH>; + output-low; + line-name =3D "blc_r"; + }; + + blc-l-hog { + gpio-hog; + gpios =3D <16 GPIO_ACTIVE_HIGH>; + output-low; + line-name =3D "blc_l"; + }; + + high-hog { + gpio-hog; + gpios =3D <15 GPIO_ACTIVE_HIGH /* maybe dsi to dpi chip reset? */ + 21 GPIO_ACTIVE_HIGH + 26 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "unknown-high"; + }; + + low-hog { + gpio-hog; + gpios =3D <18 GPIO_ACTIVE_HIGH + 19 GPIO_ACTIVE_HIGH + 20 GPIO_ACTIVE_HIGH + 22 GPIO_ACTIVE_HIGH>; + output-low; + line-name =3D "unknown-low"; + }; +}; + &i2c1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c1_pins>; @@ -406,6 +473,22 @@ OMAP4_IOPAD(0x56, PIN_INPUT_PULLUP | MUX_MODE3) /* gpi= o35 */ >; }; =20 + gpio1_hog_pins: pinmux-gpio1-hog-pins { + pinctrl-single,pins =3D < + OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE3) /* gpio14 */ + OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE3) /* gpio16 */ + OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE3) /* gpio17 */ + + OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE3) /* gpio15 */ + OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE3) /* gpio18 */ + OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE3) /* gpio19 */ + OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE3) /* gpio20 */ + OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE3) /* gpio21 */ + OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE3) /* gpio22 */ + OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE3) /* gpio26 */ + >; + }; + i2c1_pins: pinmux-i2c1-pins { pinctrl-single,pins =3D < OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ @@ -527,6 +610,15 @@ OMAP4_IOPAD(0x1c8, PIN_OUTPUT | MUX_MODE3) /* gpio_24= / WLAN_EN */ }; }; =20 +&omap4_pmx_wkup { + gpio1wk_hog_pins: pinmux-gpio1wk-hog-pins { + pinctrl-single,pins =3D < + OMAP4_IOPAD(0x68, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpio9 */ + OMAP4_IOPAD(0x6a, PIN_INPUT | MUX_MODE3) /* gpio10 */ + >; + }; +}; + &uart2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&uart2_pins &bt_pins>; --=20 2.39.5 From nobody Wed Nov 27 10:39:42 2024 Received: from mail.andi.de1.cc (mail.andi.de1.cc [178.238.236.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4F491C579E; Thu, 10 Oct 2024 12:30:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.238.236.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563408; cv=none; b=RW8CwotWG7sfcfacmNnFWDbjbwAfzssTqCStHvTO2Rvq3kLUyDhGJYOKep76esvI9yYCyvC5hVs0XBjYg36eRFLx25ZEz6xDkczpaEQTYeC8uH98/nTKnoXv019mE1y33g2eAj6L7iW+vhZcMeiQ5vB+RvlNPcXh/4o5obut+7w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563408; c=relaxed/simple; bh=LVhddGZweBSURqGzn9VZDRZri76N2rZDvfb48+vvFdw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ewoGZ9uJlCFtDEvUdg7/tZVs47zoXfcsoCW6NDXYihvBkO9Es/bABNR//sUC2YTFAkJSbbJJ2i6zN/JIQE2XuGwDohhiN446jLP6fHvFXg8xS6qCPZo9k03poF4zuAg0K6osmJ3KTW6U4GYmteaKiqKLGEg90NvqABhdkmVGVs4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kemnade.info; spf=pass smtp.mailfrom=kemnade.info; dkim=pass (2048-bit key) header.d=kemnade.info header.i=@kemnade.info header.b=1JM2sSak; arc=none smtp.client-ip=178.238.236.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kemnade.info Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=kemnade.info Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kemnade.info header.i=@kemnade.info header.b="1JM2sSak" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kemnade.info; s=20220719; h=References:In-Reply-To:Cc:From:Sender:Reply-To: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=u7NgFmqNWBbaPcWNB6etpacuZmDj/dTMj7FspcWJt7E=; b=1JM2sSakHC5JBJ9T1uMAVgQbEj 6cuToNE62GJJdIxy+PltPHENnoO0VvHgstayUfcwTlAFt327Qwu5aDN0PaoDkl0P2NhWl9vycgLPY y2Pv138UeP86d7IiF430qiHjagUEB+3wSx+B1NlS2LxAUd7HFrmfjTu/y4WexpUqLE6T4x3J6PJKq n3FHuRPN4t6yDD1biCFu1PdvdBmeRd11zBGgw4k2qp629h3Hyj2Tv+U8DwG214YDMU4jxsL243ESK 0Mr6+02Bz6hs7OTlAwUfclWkdgOnDmx0V1ulDiPy+Y4EmAD5Vcr4w5q1kVfIfoe9+4b7/1PajQB+A JIOVcv7A==; From: Andreas Kemnade To: linux-kernel@vger.kernel.org, Rob Herring , rogerq@kernel.org, linux-omap@vger.kernel.org, Krzysztof Kozlowski , tony@atomide.com, devicetree@vger.kernel.org, khilman@baylibre.com, Conor Dooley , aaro.koskinen@iki.fi Cc: Andreas Kemnade Subject: [PATCH v2 4/4] ARM: dts: omap: omap4-epson-embt2ws: add GPIO expander Date: Thu, 10 Oct 2024 14:29:57 +0200 Message-Id: <20241010122957.85164-5-andreas@kemnade.info> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241010122957.85164-1-andreas@kemnade.info> References: <20241010122957.85164-1-andreas@kemnade.info> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Define the GPIO expander which controls at least some camera gpios. Signed-off-by: Andreas Kemnade Reviewed-by: Roger Quadros --- arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts b/arch/arm/b= oot/dts/ti/omap/omap4-epson-embt2ws.dts index 983a21d95db3..6bc8c0397c29 100644 --- a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts +++ b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts @@ -299,6 +299,19 @@ &i2c2 { =20 clock-frequency =3D <200000>; =20 + /* is sometimes not available, research needed */ + gpio_head: gpio@20 { + compatible =3D "ti,tca6408"; + reg =3D <0x20>; + gpio-controller; + #gpio-cells =3D <2>; + }; + + /* + * camera chip at 0x3c, available if <&gpio_head 1> high + * and <&gpio_head 5> low + */ + /* at head/glasses */ mpu9150h: imu@68 { compatible =3D "invensense,mpu9150"; --=20 2.39.5