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[92.238.24.70]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c9370d22fesm640154a12.19.2024.10.10.04.22.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2024 04:22:05 -0700 (PDT) From: Colin Ian King To: Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , Xinhui Pan , David Airlie , Simona Vetter , Leo Liu , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH][next] drm/amdgpu: Fix potential integer overflow on shift of a int Date: Thu, 10 Oct 2024 12:22:04 +0100 Message-Id: <20241010112204.636188-1-colin.i.king@gmail.com> X-Mailer: git-send-email 2.39.5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The left shift of int 32 bit integer constant 1 is evaluated using 32 bit arithmetic and then assigned to and operated upon using a 64 bit unsigned integer. In the case where the shift is 32 or more this can lead to an overflow. Avoid this by shifting using the BIT_ULL macro instead. Fixes: f0b19b84d391 ("drm/amdgpu: add amdgpu_jpeg_sched_mask debugfs") Signed-off-by: Colin Ian King --- drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c b/drivers/gpu/drm/amd= /amdgpu/amdgpu_jpeg.c index 95e2796919fc..136a0c8d8c7a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c @@ -357,14 +357,14 @@ static int amdgpu_debugfs_jpeg_sched_mask_set(void *d= ata, u64 val) if (!adev) return -ENODEV; =20 - mask =3D (1 << (adev->jpeg.num_jpeg_inst * adev->jpeg.num_jpeg_rings)) - = 1; + mask =3D (BIT_ULL(adev->jpeg.num_jpeg_inst * adev->jpeg.num_jpeg_rings)) = - 1; if ((val & mask) =3D=3D 0) return -EINVAL; =20 for (i =3D 0; i < adev->jpeg.num_jpeg_inst; ++i) { for (j =3D 0; j < adev->jpeg.num_jpeg_rings; ++j) { ring =3D &adev->jpeg.inst[i].ring_dec[j]; - if (val & (1 << ((i * adev->jpeg.num_jpeg_rings) + j))) + if (val & BIT_ULL((i * adev->jpeg.num_jpeg_rings) + j)) ring->sched.ready =3D true; else ring->sched.ready =3D false; @@ -388,7 +388,7 @@ static int amdgpu_debugfs_jpeg_sched_mask_get(void *dat= a, u64 *val) for (j =3D 0; j < adev->jpeg.num_jpeg_rings; ++j) { ring =3D &adev->jpeg.inst[i].ring_dec[j]; if (ring->sched.ready) - mask |=3D 1 << ((i * adev->jpeg.num_jpeg_rings) + j); + mask |=3D BIT_ULL((i * adev->jpeg.num_jpeg_rings) + j); } } *val =3D mask; --=20 2.39.5