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charset="utf-8" For TJA11xx PHYs, they have the capability to output 50MHz reference clock on REF_CLK pin in RMII mode, which is called "revRMII" mode in the PHY data sheet. Signed-off-by: Wei Fang --- V2 changes: 1. Change the property name. 2. Modify the subject and commit message. V3 changes: No changes. V4 changes: 1. Change the property name based on patch 1. V5 changes: 1. Fix a typo in the title. 2. Based on Russel's suggestion, add comment to MII_BASIC_CONFIG_REV and the basic_config variable to make the code clearer. --- drivers/net/phy/nxp-c45-tja11xx.c | 30 +++++++++++++++++++++++++++++- drivers/net/phy/nxp-c45-tja11xx.h | 1 + 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tj= a11xx.c index 5af5ade4fc64..7e328c2a29a4 100644 --- a/drivers/net/phy/nxp-c45-tja11xx.c +++ b/drivers/net/phy/nxp-c45-tja11xx.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -185,6 +186,8 @@ =20 #define NXP_C45_SKB_CB(skb) ((struct nxp_c45_skb_cb *)(skb)->cb) =20 +#define TJA11XX_REVERSE_MODE BIT(0) + struct nxp_c45_phy; =20 struct nxp_c45_skb_cb { @@ -1510,6 +1513,8 @@ static int nxp_c45_get_delays(struct phy_device *phyd= ev) =20 static int nxp_c45_set_phy_mode(struct phy_device *phydev) { + struct nxp_c45_phy *priv =3D phydev->priv; + u16 basic_config; int ret; =20 ret =3D phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_ABILITIES); @@ -1561,8 +1566,15 @@ static int nxp_c45_set_phy_mode(struct phy_device *p= hydev) phydev_err(phydev, "rmii mode not supported\n"); return -EINVAL; } + + basic_config =3D MII_BASIC_CONFIG_RMII; + + /* This is not PHY_INTERFACE_MODE_REVRMII */ + if (priv->flags & TJA11XX_REVERSE_MODE) + basic_config |=3D MII_BASIC_CONFIG_REV; + phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_MII_BASIC_CONFIG, - MII_BASIC_CONFIG_RMII); + basic_config); break; case PHY_INTERFACE_MODE_SGMII: if (!(ret & SGMII_ABILITY)) { @@ -1623,6 +1635,20 @@ static int nxp_c45_get_features(struct phy_device *p= hydev) return genphy_c45_pma_read_abilities(phydev); } =20 +static int nxp_c45_parse_dt(struct phy_device *phydev) +{ + struct device_node *node =3D phydev->mdio.dev.of_node; + struct nxp_c45_phy *priv =3D phydev->priv; + + if (!IS_ENABLED(CONFIG_OF_MDIO)) + return 0; + + if (of_property_read_bool(node, "nxp,rmii-refclk-out")) + priv->flags |=3D TJA11XX_REVERSE_MODE; + + return 0; +} + static int nxp_c45_probe(struct phy_device *phydev) { struct nxp_c45_phy *priv; @@ -1642,6 +1668,8 @@ static int nxp_c45_probe(struct phy_device *phydev) =20 phydev->priv =3D priv; =20 + nxp_c45_parse_dt(phydev); + mutex_init(&priv->ptp_lock); =20 phy_abilities =3D phy_read_mmd(phydev, MDIO_MMD_VEND1, diff --git a/drivers/net/phy/nxp-c45-tja11xx.h b/drivers/net/phy/nxp-c45-tj= a11xx.h index f364fca68f0b..8b5fc383752b 100644 --- a/drivers/net/phy/nxp-c45-tja11xx.h +++ b/drivers/net/phy/nxp-c45-tja11xx.h @@ -28,6 +28,7 @@ struct nxp_c45_phy { int extts_index; bool extts; struct nxp_c45_macsec *macsec; + u32 flags; }; =20 #if IS_ENABLED(CONFIG_MACSEC) --=20 2.34.1