From nobody Wed Nov 27 10:46:49 2024 Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 388B41C2457 for ; Thu, 10 Oct 2024 12:33:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563605; cv=none; b=Ea4LRxBmY7piejoAC+iu4oC2rF1KsgYHAigUmdQmINdpb6luUfjSqjff/3UUPXPO6lLHAQI9h3zdqu4fGoLNjADj37yVEKVQqryQ8z10yONqI0W2f1OuPv60A4SSD5D/h9XOV+fpO2ajfCXJdfGpx4PMYSPLT5BvaP05+ahlPGc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563605; c=relaxed/simple; bh=vTwVvG8iZlHzHza+YS67mEwp2zyunt+kNzBDYWtFYWc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Rz2Gtb1jIhhkUKTkZMgrmoF0uc1gp9zSEaQL0myvMY/Wz18Ljb4ILmWd5SxardtwFjUQwloXy25ZH2KzvUAnnYYA2CDXZa/r2L6BvE+L8Pf/kmzylK+KF8hSkgaWQldI7acfEuTY7DOxJnRvRhwRzxpEOI3Zjq9rtdEKjJAZO0E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=TTO1LpHX; arc=none smtp.client-ip=209.85.218.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="TTO1LpHX" Received: by mail-ej1-f54.google.com with SMTP id a640c23a62f3a-a99650da839so143741066b.2 for ; Thu, 10 Oct 2024 05:33:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728563600; x=1729168400; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E7nKjwcfTxwC0PwN6GrPgJAgBaaTNk6QSx4URpDS/gc=; b=TTO1LpHXOLabmIAmzM91/snWCtvv6wO0vkh5YbV7/cznHuH8zI/UVqt/Yn1UFIjZfG Vwag2pcC6OZJN5VypGZvB5CwaKs9HTVj4XAoBJbosK94m5nyzBfvFdzW+w5rb3Us67b2 vOD2mx5tmBZWLokuzquBO3aILt5mrfOq21VBbGRF/K6v0G2WQj9EaMTh38GH7nGtbfpN eDVQxW577vO/D/JRQfkhFHbOkK6DyTpP7dTsmjAbAnPXT2UiAEnOZBOjsqdTFhzevE+/ wW12RzmUA7q9+NAJlTNDtYHuhoO0OdTj01X6Kd9Hjh9fyWC5cXpEreQ5DMjg30zAYvU3 HutA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728563600; x=1729168400; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E7nKjwcfTxwC0PwN6GrPgJAgBaaTNk6QSx4URpDS/gc=; b=O8FYffcFQEdA9/DTQ2JvkR9cWi/BdZ4/HniDlm05hOy49BAEtiWRUpLSO7nNHzy5nS CFfhx0HvnnDD2AyxoY32T4VmhpI7d5n7gjojc9COYYAm3Dsrh4xn1QpK930Af1Og0jWY BpupcA7x29oWvAUxgfKDeUxybvOAR/WeirMaYBMHen4FVzIrArGbALYdecPhRJ0oFa8O kXPKtDWVVWWocLve+Y6sSfbZgKSf5cFYP9lSCAxQzhADY4PWRNNsShiqu9KUJem4akbl uF5K4EfEkp/CEaWMFrBdKjih+5xBWOjrEK8KjcU1XL69xPvT9juxK5vESEsg8l73y8R2 PvyQ== X-Forwarded-Encrypted: i=1; AJvYcCXWBPQS+gVghty3/8efIf/OrTJX5PTRbASJD2PKEjD/vMksbQ0UATagmqNw6B1tKaetMxIfuRqAWxZDJFg=@vger.kernel.org X-Gm-Message-State: AOJu0YxdoCQaf6knDBZlxLpAh1s7KGxYP9HduHX5aQ28Y3DNJizGYE+C 7xvrIAWKuJ8EbJDQodmUsUzNboKYg70P4ZBwjAMDf5H1kaAwXQycxioumhhGHOk= X-Google-Smtp-Source: AGHT+IHqASwGUMnDVgJgb4WJeQPIBPzArPqf/9fuxIBXwaaZeDpGjQ9ON98FkBxOBIkv3lrX0VtBMg== X-Received: by 2002:a17:907:7f94:b0:a7a:aa35:408c with SMTP id a640c23a62f3a-a998d10df8bmr555871766b.8.1728563600518; Thu, 10 Oct 2024 05:33:20 -0700 (PDT) Received: from [127.0.0.1] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80c0723sm82416666b.135.2024.10.10.05.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2024 05:33:20 -0700 (PDT) From: Bryan O'Donoghue Date: Thu, 10 Oct 2024 13:33:17 +0100 Subject: [PATCH v6 1/4] media: ov08x40: Fix burst write sequence Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241010-b4-master-24-11-25-ov08x40-v6-1-cf966e34e685@linaro.org> References: <20241010-b4-master-24-11-25-ov08x40-v6-0-cf966e34e685@linaro.org> In-Reply-To: <20241010-b4-master-24-11-25-ov08x40-v6-0-cf966e34e685@linaro.org> To: Sakari Ailus , Jason Chen , Mauro Carvalho Chehab , Sergey Senozhatsky , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue , stable@vger.kernel.org X-Mailer: b4 0.15-dev-dedf8 It is necessary to account for I2C quirks in the burst mode path of this driver. Not all I2C controllers can accept arbitrarily long writes and this is represented in the quirks field of the adapter structure. Prior to this patch the following error message is seen on a Qualcomm X1E80100 CRD. [ 38.773524] i2c i2c-2: adapter quirk: msg too long (addr 0x0036, size 29= 0, write) [ 38.781454] ov08x40 2-0036: Failed regs transferred: -95 [ 38.787076] ov08x40 2-0036: ov08x40_start_streaming failed to set regs Fix the error by breaking up the write sequence into the advertised maximum write size of the quirks field if the quirks field is populated. Fixes: 8f667d202384 ("media: ov08x40: Reduce start streaming time") Cc: stable@vger.kernel.org # v6.9+ Tested-by: Bryan O'Donoghue # x1e80100-crd Signed-off-by: Bryan O'Donoghue --- drivers/media/i2c/ov08x40.c | 33 ++++++++++++++++++++++++++++----- 1 file changed, 28 insertions(+), 5 deletions(-) diff --git a/drivers/media/i2c/ov08x40.c b/drivers/media/i2c/ov08x40.c index 48df077522ad0bb2b5f64a6def8844c02af6a193..be25e45175b1322145dca428e84= 5242d8fea2698 100644 --- a/drivers/media/i2c/ov08x40.c +++ b/drivers/media/i2c/ov08x40.c @@ -1339,15 +1339,13 @@ static int ov08x40_read_reg(struct ov08x40 *ov08x, return 0; } =20 -static int ov08x40_burst_fill_regs(struct ov08x40 *ov08x, u16 first_reg, - u16 last_reg, u8 val) +static int __ov08x40_burst_fill_regs(struct i2c_client *client, u16 first_= reg, + u16 last_reg, size_t num_regs, u8 val) { - struct i2c_client *client =3D v4l2_get_subdevdata(&ov08x->sd); struct i2c_msg msgs; - size_t i, num_regs; + size_t i; int ret; =20 - num_regs =3D last_reg - first_reg + 1; msgs.addr =3D client->addr; msgs.flags =3D 0; msgs.len =3D 2 + num_regs; @@ -1373,6 +1371,31 @@ static int ov08x40_burst_fill_regs(struct ov08x40 *o= v08x, u16 first_reg, return 0; } =20 +static int ov08x40_burst_fill_regs(struct ov08x40 *ov08x, u16 first_reg, + u16 last_reg, u8 val) +{ + struct i2c_client *client =3D v4l2_get_subdevdata(&ov08x->sd); + size_t num_regs, num_write_regs; + int ret; + + num_regs =3D last_reg - first_reg + 1; + num_write_regs =3D num_regs; + + if (client->adapter->quirks && client->adapter->quirks->max_write_len) + num_write_regs =3D client->adapter->quirks->max_write_len - 2; + + while (first_reg < last_reg) { + ret =3D __ov08x40_burst_fill_regs(client, first_reg, last_reg, + num_write_regs, val); + if (ret) + return ret; + + first_reg +=3D num_write_regs; + } + + return 0; +} + /* Write registers up to 4 at a time */ static int ov08x40_write_reg(struct ov08x40 *ov08x, u16 reg, u32 len, u32 __val) --=20 2.46.2 From nobody Wed Nov 27 10:46:49 2024 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 835321C1AD9 for ; Thu, 10 Oct 2024 12:33:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563605; cv=none; b=PfL+1AM5JcUhjJjzTP9soy8nFXM95QgCLjTJmdC3NuLyzej1vac3vrzal0JSwg2RVP/CUdN/ZPSggqepJ5l4yVtqar1xn72ps66DOl9LzcQKzSuAv6jtZC1hxez0RkX6Ui6bxNN6Fqk1L7PJ7GPng88n6Ixk1lbyiEUyhDqjODw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563605; c=relaxed/simple; bh=fCv2ql3x5MRYj+V94Droy/AZAMcQ97gJ5jPEcJz0y8c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=l/Ze7rauNg0By+5gP0t2ePzYbMUZoL9vpV/ibKyraFtTT8cTP3gW0CNkg+S8ioSrMCVqIq/A0yHb2kw/2esHztn6F2fof7E+7iPn5iWMX9YM29S7cMkClI8NrZf0SgcydoTUgzRhaC65bNDZzIKFBDGzn1DaJTSJYZx+cpFFRg8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=tOUKZjjY; arc=none smtp.client-ip=209.85.218.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="tOUKZjjY" Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-a99543ab209so120554166b.2 for ; Thu, 10 Oct 2024 05:33:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728563602; x=1729168402; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=FCl/oQotG7Ck6NtzjioXPnOyFASYLcPzzgeAry7FXvU=; b=tOUKZjjYtIa54LTxqTIkiLk+S9Rccq6e7HiciRFh+Q8kyEL5KvvKJlzCJ+//jdCM1i HuruiQubn2wtSj4oEPoryoBsmLFUBXn0yFzXZNir7vu9+PGoUXaYA8GfWunKCawjVegR A80uN+BdexxJQIQoa/iPqZzyb+QDYvsNk5uFXKP5OI7MJ+ag0r9ggzPaLApiOjkD7gTT D3k2PILwjKBOS86qY8vdwsHpp2bmlVuW1qe2XRr8V4F+yWXm2LARgmXl3SGusVbqMYQx zu1opxXBH0fam6T1Sq1TeYdofOIWDzRDH2dzcf+QxBSP735juoTdUE9bhstEwBsTF7fX 93rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728563602; x=1729168402; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FCl/oQotG7Ck6NtzjioXPnOyFASYLcPzzgeAry7FXvU=; b=kEaDNV0cvhyhwIy5fAdd1dU1vN6QTK5zUbX81Bpd5oXW/M3Yfs/yfWKjDbRdQoR2j9 jAYSIrPQN69STpqjHCZ3hUpAnRneVDOi0ePk05Z7vvmeSY3bQQc0FKzBQMcZ3vjx0dX1 XdYdXWvRpfqVzQwBrxmPvMdOrrWKttb9DngiUuRIoLmqD6Ceeg/navHKvEIBBzyxbV1j CS2/lhZ4BlybOB6GFhsqj4XbG7uDbHJpWXJCafy95jke9iaUgBr8ccq3Fq270CUUrOFw R8fGMMwiJ4vNKJ7bUQdYq5ZfXy2dSpqQJvRKsIhQCEhIK0+9j/LdLfVNzfSkxxol0+Fr 0rcA== X-Forwarded-Encrypted: i=1; AJvYcCUtIbveOZQ+qFz8GmH1z5pI+mIlNQMNQD7MmnY+G0TuPrYYkUsFTTLVnVlO12oAR7b13roKP2I+X9eWmeQ=@vger.kernel.org X-Gm-Message-State: AOJu0YxLdwy1EvnioNeMoxIoz1JjNqup72az5wor0YjMcQbe/D3G1fYU JHY1dOK1ngckQ6teH3zeNdeNopvKDwPElFY9c+1Qh56OyZhnR54jemeB8WlTyKc= X-Google-Smtp-Source: AGHT+IEN8tvLkNd2SXFiSFvvdTshSPJa0h2Z7P/ZCsSDK9uL+ad6NWD80/M3p3V1zOus1/1nyuyRDg== X-Received: by 2002:a17:907:60d6:b0:a99:4982:da46 with SMTP id a640c23a62f3a-a998d3299a8mr448933766b.63.1728563601693; Thu, 10 Oct 2024 05:33:21 -0700 (PDT) Received: from [127.0.0.1] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80c0723sm82416666b.135.2024.10.10.05.33.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2024 05:33:21 -0700 (PDT) From: Bryan O'Donoghue Date: Thu, 10 Oct 2024 13:33:18 +0100 Subject: [PATCH v6 2/4] media: dt-bindings: Add OmniVision OV08X40 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241010-b4-master-24-11-25-ov08x40-v6-2-cf966e34e685@linaro.org> References: <20241010-b4-master-24-11-25-ov08x40-v6-0-cf966e34e685@linaro.org> In-Reply-To: <20241010-b4-master-24-11-25-ov08x40-v6-0-cf966e34e685@linaro.org> To: Sakari Ailus , Jason Chen , Mauro Carvalho Chehab , Sergey Senozhatsky , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.15-dev-dedf8 Add bindings for the already upstream OV08X40 to enable usage of this sensor on DTS based systems. Signed-off-by: Bryan O'Donoghue Acked-by/Reviewed-by/Tested-by tags when posting new versions, under Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/i2c/ovti,ov08x40.yaml | 120 +++++++++++++++++= ++++ 1 file changed, 120 insertions(+) diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov08x40.yaml = b/Documentation/devicetree/bindings/media/i2c/ovti,ov08x40.yaml new file mode 100644 index 0000000000000000000000000000000000000000..552efdf8934f73f8f202f555535= 1f1123b91a252 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov08x40.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) 2024 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ovti,ov08x40.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Omnivision OV08X40 CMOS Sensor + +maintainers: + - Bryan O'Donoghue + +description: | + The Omnivision OV08X40 is a 9.2 megapixel, CMOS image sensor which suppo= rts: + - Automatic black level calibration (ABLC) + - Programmable controls for frame rate, mirror and flip, binning, croppi= ng + and windowing + - Output formats 10-bit 4C RGB RAW, 10-bit Bayer RAW + - 4-lane MIPI D-PHY TX @ 1 Gbps per lane + - 2-lane MPIP D-PHY TX @ 2 Gbps per lane + - Dynamic defect pixel cancellation + - Standard SCCB command interface + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + const: ovti,ov08x40 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + avdd-supply: + description: Analogue circuit voltage supply. + + dovdd-supply: + description: I/O circuit voltage supply. + + dvdd-supply: + description: Digital circuit voltage supply. + + reset-gpios: + description: Active low GPIO connected to XSHUTDOWN pad of the sensor. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + additionalProperties: false + + properties: + data-lanes: + oneOf: + - items: + - const: 1 + - const: 2 + - items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + link-frequencies: true + remote-endpoint: true + + required: + - data-lanes + - link-frequencies + - remote-endpoint + +required: + - compatible + - reg + - clocks + - port + +unevaluatedProperties: false + +examples: + - | + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + ov08x40: camera@36 { + compatible =3D "ovti,ov08x40"; + reg =3D <0x36>; + + reset-gpios =3D <&tlmm 111 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam_rgb_defaultt>; + + clocks =3D <&ov08x40_clk>; + + assigned-clocks =3D <&ov08x40_clk>; + assigned-clock-parents =3D <&ov08x40_clk_parent>; + assigned-clock-rates =3D <19200000>; + + avdd-supply =3D <&vreg_l7b_2p8>; + dvdd-supply =3D <&vreg_l7b_1p8>; + dovdd-supply =3D <&vreg_l3m_1p8>; + + port { + ov08x40_ep: endpoint { + remote-endpoint =3D <&csiphy4_ep>; + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <400000000>; + }; + }; + }; + }; +... --=20 2.46.2 From nobody Wed Nov 27 10:46:49 2024 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFD2A1C6896 for ; Thu, 10 Oct 2024 12:33:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563606; cv=none; b=AoMKHgdFRLDgXWST2sgLo9gyuKOvb2AbfnfsUeyObEwxLHvQCWECu2x4v+mep38zThs8rjec1/US5sVFq7P5BrlwDxotl6vuTLzNeNIeaqCGOAM8rhCbScjDhQwFKno+xYCGn00wXXyCVv0wzEjweZKd1g4gci96CVWuJP3sY7E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563606; c=relaxed/simple; bh=KuJYhS6BLwFHq2M3BsUApExs70W98G5/TG0tISRMP7Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SfJ1JpW9u9CR2fZbXRwP34UxULnbG4j8D9fOF81tbfdq7FTLxWmf3VIV4KtV88bIugP6VhJFBYgjP0dJ1zTPyDFs1wsVb37IZNldRUtra7FfOH7RQdS8ZBjNF2koTkItm3nzwgVMh9ak4SKQXi/G/ay6idzi3UPiiG4sdn5/4RQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=InJNtkpR; arc=none smtp.client-ip=209.85.218.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="InJNtkpR" Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-a9982159d98so141601266b.1 for ; Thu, 10 Oct 2024 05:33:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728563603; x=1729168403; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=wDWnOefZjmiIEjMknhotah0eI13dQMdxoD4kz7zvhSU=; b=InJNtkpRB3rvWqsgxWuZ26JEOorIycoPYwsiYMM+vmOEmjZSYXuUGCQfweSFWirQnY R/dV1xvt5d44SQVc7slBP+F/9b38OYFOMstTp9nEW2JgaAApNGw5atT/Zli+3MMUX8gG ptCOiGvaa+izSbx/POOr8rghbBX4W3g7kkO0AKnEdTepXmCNWxldBzGyBqTdMYuq0pJ9 j0UDr1t2qTM1LuYmhfkbgS3cXAdbWvHsCQsbi3P6dDOKNhcO1jCO2SjoqrDhZebd7ZCP P1NGQc8OEZBCsXpLIZsjrtOxr3E7lidiAT1zzM8Oy0BOq9HjH6mTj8u39PHptRH94IAq uWaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728563603; x=1729168403; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wDWnOefZjmiIEjMknhotah0eI13dQMdxoD4kz7zvhSU=; b=s7PzfS43NXqSv44wh2J9HbaMMh9CDo9KE4xs1IwXr0FVuj6YVmka+c0hRnrM1MZtdd OVkHdZ+Hg77pK9jX/syMa0TYBuf8UG/I8QbjEq7EBjtGTXreB0fs1sPti5otlyotwd8q 3VBbOeJA7+mXbm8h8lDSjQVqlKxE9m8I7e9g0Y+QYaeN/bif5bg/jVZKzIGvQaiLUyZu xcL12czt5HEeAxg+xueATmsw7FWaq7JtIOXANKOxqgfvbczLQNrb2ujGpfvywD6YnSod KGvtrKQouRT0WIBR3Ud50729d4jRhqyG/F0m2aHzau0FfBvGfTerN1M+f5Y3ICzaWObi pEQA== X-Forwarded-Encrypted: i=1; AJvYcCVGwGc3wterFFf5QLfp1CKZLgkvh/3NzCc3AMjpR9zyS4OxE1emq4D4swGct7+B1T/8XZpWa14NTA1r2M4=@vger.kernel.org X-Gm-Message-State: AOJu0YwUSLvX58wH5LAHtxTJYEkg61IE/jjRz0rS3Gaq/AF+oJZmDttC OMTTASE7Wh7Uw4JiiMyyx6wfl/xSpiHHz4V+FN6qtgZpqqOEWUfdfBMeQn2+5o8= X-Google-Smtp-Source: AGHT+IHfZ6X8GXgC8wsZ2KRljq0m2VKytBnnmaGg4/iAn7dxvcGlhXWjOd4IaDOLDhRHZf/dEyqWlg== X-Received: by 2002:a17:907:6d24:b0:a99:7999:281 with SMTP id a640c23a62f3a-a998d314b9cmr613150766b.48.1728563603136; Thu, 10 Oct 2024 05:33:23 -0700 (PDT) Received: from [127.0.0.1] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80c0723sm82416666b.135.2024.10.10.05.33.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2024 05:33:22 -0700 (PDT) From: Bryan O'Donoghue Date: Thu, 10 Oct 2024 13:33:19 +0100 Subject: [PATCH v6 3/4] media: ov08x40: Rename ext_clk to xvclk Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241010-b4-master-24-11-25-ov08x40-v6-3-cf966e34e685@linaro.org> References: <20241010-b4-master-24-11-25-ov08x40-v6-0-cf966e34e685@linaro.org> In-Reply-To: <20241010-b4-master-24-11-25-ov08x40-v6-0-cf966e34e685@linaro.org> To: Sakari Ailus , Jason Chen , Mauro Carvalho Chehab , Sergey Senozhatsky , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.15-dev-dedf8 The data-sheet and documentation for this part uses the name xvclk not ext_clk for the input reference clock. Rename the variables and defines in this driver to align with the data-sheet name. Signed-off-by: Bryan O'Donoghue --- drivers/media/i2c/ov08x40.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/media/i2c/ov08x40.c b/drivers/media/i2c/ov08x40.c index be25e45175b1322145dca428e845242d8fea2698..3ab8b51df157af78fcccc1aaef7= 3aedb2ae759c9 100644 --- a/drivers/media/i2c/ov08x40.c +++ b/drivers/media/i2c/ov08x40.c @@ -1215,7 +1215,7 @@ static const char * const ov08x40_test_pattern_menu[]= =3D { /* Configurations for supported link frequencies */ #define OV08X40_LINK_FREQ_400MHZ 400000000ULL #define OV08X40_SCLK_96MHZ 96000000ULL -#define OV08X40_EXT_CLK 19200000 +#define OV08X40_XVCLK 19200000 #define OV08X40_DATA_LANES 4 =20 /* @@ -2081,21 +2081,21 @@ static int ov08x40_check_hwcfg(struct device *dev) struct fwnode_handle *fwnode =3D dev_fwnode(dev); unsigned int i, j; int ret; - u32 ext_clk; + u32 xvclk_rate; =20 if (!fwnode) return -ENXIO; =20 ret =3D fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", - &ext_clk); + &xvclk_rate); if (ret) { dev_err(dev, "can't get clock frequency"); return ret; } =20 - if (ext_clk !=3D OV08X40_EXT_CLK) { + if (xvclk_rate !=3D OV08X40_XVCLK) { dev_err(dev, "external clock %d is not supported", - ext_clk); + xvclk_rate); return -EINVAL; } =20 --=20 2.46.2 From nobody Wed Nov 27 10:46:49 2024 Received: from mail-ed1-f47.google.com (mail-ed1-f47.google.com [209.85.208.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E42361C6F64 for ; Thu, 10 Oct 2024 12:33:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563607; cv=none; b=el4iuPPNFG2L/sYrYBf/gRm5429RgpG9Mn4YOK/5owKeYHStQmUA8KfDbtaC1aXxKsdo4IXDZ6DSO1WuqWL0KQQbDix2a7I1bNJf5wjAEe/yt6ElkLV4bErG4PdytQB1bDCavE0fTtlT6Cs+VUj0eO7VYk6GhV9kx4t8ZYoDTeM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728563607; c=relaxed/simple; bh=MZdA/sRLAsmvUPZP3TphhP3dJzkLom00eAxDcabblxk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=I/qMdqnw3X9HXdpVwZwAMJ/3Yt7KqgDFUFrZ3+Y5VrM3bAwh/j5RQ/Or8YTPfywhI59gyVH2e/064xISvHYe8WCNwAmfe9hMBPVuaArUDzV4nM/voW/GvYxPtoHNtktp/LNdn2TpyJBwGAieHRYCboc6r8QXvwIDMaqUXRAwXEk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=SM97DiMr; arc=none smtp.client-ip=209.85.208.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="SM97DiMr" Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-5c896b9b4e0so1114458a12.3 for ; Thu, 10 Oct 2024 05:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728563604; x=1729168404; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pseR3SnwJF/ltwSCthgN9v3QXyD9/cz3sKkOTqoReDs=; b=SM97DiMrnC83JeUIKj9RF1EU1iNcSYc3E//vBWdPPgjA/1zvakx9tEc3HNhCPIpj3d hKbrsqSoPDAgE2KwcsGiF3rkaPdvpPvZ/QetAfunH7PLArJrWtBgTLCxmPirL5tcBSBK 8XlwyPDzVsLZWn99v2VCHyPN2ze7pwgFdPgZfOGsRfmdTWCpgBEvG0xOIDVQBxVo/CGO FBwQhIPvDEFuubctGrGlb2ZN5QxdTOANuM0mIy9e4aAta6Y766q7TqE7lpgy6IrFWd5o t4GOXTLkS/61t+tvNGas81blbxvcKX1hSjHJ3taAAy2ApDFkPGqzn/cJsGjje+NDqLdG Z5vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728563604; x=1729168404; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pseR3SnwJF/ltwSCthgN9v3QXyD9/cz3sKkOTqoReDs=; b=ICmAujWpK8gbcz8YkJeNCpgSrH02nn+TYc5JcscAgzKoFXmdnGLuoGchNA/dY1mLU6 quyaask+wbe/mTysQQXCIp7BV+YJc6Jwc9Pji5Hm9G4OQmnaYJrua/vi3QmrGTGzCeBc LztckisRv6PS9VBTM8QVwL1Tyf5jRWfSWY2QmIkTgPbUOPtn46bZH/xukNc7RgttTxlu rh9xqguvDu2/1TWtSe9tnFY6ZhPStLD1e63R0BAI9tScZndpMf8Li4K7AAzf++nCR8+/ LU7yoxEmHGAFv3UPyw8zXPp499zQVUTHdj0ZksoT4XF2gIAMUkaNM90VZPjAQ2uzzSnp 6NPQ== X-Forwarded-Encrypted: i=1; AJvYcCWDyFk5NWdnlXxf/U+Zx20+Q+CXyDDRAerUllG93uD8ES9CwFJXqjkACHQpkOFjD0yumKTWHHRJpi3RYUQ=@vger.kernel.org X-Gm-Message-State: AOJu0YxLITZ6FZjf8jS3b2MOy2OwKu0/nXmDLHCKvBB/6CHqCPGcqxqs dzkUz6psGlflKz0N3qGALsVK81sG4Os6TufWshM2nOzyeSxBD+bp7tZq5NZof60= X-Google-Smtp-Source: AGHT+IGsEAwOniVhOvr2BEUkHjs15aSsr0j0fhFXCgyZqFO3bbPu9rpUCfEpdMrHQ3cxSH31yKbA/A== X-Received: by 2002:a17:907:940f:b0:a99:375f:4523 with SMTP id a640c23a62f3a-a998d32b90bmr588588766b.44.1728563604259; Thu, 10 Oct 2024 05:33:24 -0700 (PDT) Received: from [127.0.0.1] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80c0723sm82416666b.135.2024.10.10.05.33.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2024 05:33:23 -0700 (PDT) From: Bryan O'Donoghue Date: Thu, 10 Oct 2024 13:33:20 +0100 Subject: [PATCH v6 4/4] media: ov08x40: Add OF probe support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241010-b4-master-24-11-25-ov08x40-v6-4-cf966e34e685@linaro.org> References: <20241010-b4-master-24-11-25-ov08x40-v6-0-cf966e34e685@linaro.org> In-Reply-To: <20241010-b4-master-24-11-25-ov08x40-v6-0-cf966e34e685@linaro.org> To: Sakari Ailus , Jason Chen , Mauro Carvalho Chehab , Sergey Senozhatsky , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.15-dev-dedf8 The ACPI version of this driver "just works" on dts based systems with a few extensions to facilitate. - Add support for DT based probing - Add support for taking the part out of reset via a GPIO reset pin - Add in regulator bulk on/off logic for the power rails. Once done this sensor works nicely on a Qualcomm X1E80100 CRD. Tested-by: Bryan O'Donoghue # x1e80100-crd Signed-off-by: Bryan O'Donoghue --- drivers/media/i2c/ov08x40.c | 140 +++++++++++++++++++++++++++++++++++++++-= ---- 1 file changed, 125 insertions(+), 15 deletions(-) diff --git a/drivers/media/i2c/ov08x40.c b/drivers/media/i2c/ov08x40.c index 3ab8b51df157af78fcccc1aaef73aedb2ae759c9..ff17e09a1f96175d598c395bcae= 0cdf01d68a79f 100644 --- a/drivers/media/i2c/ov08x40.c +++ b/drivers/media/i2c/ov08x40.c @@ -3,10 +3,13 @@ =20 #include #include +#include #include +#include #include #include #include +#include #include #include #include @@ -1279,6 +1282,12 @@ static const struct ov08x40_mode supported_modes[] = =3D { }, }; =20 +static const char * const ov08x40_supply_names[] =3D { + "dovdd", /* Digital I/O power */ + "avdd", /* Analog power */ + "dvdd", /* Digital core power */ +}; + struct ov08x40 { struct v4l2_subdev sd; struct media_pad pad; @@ -1291,6 +1300,10 @@ struct ov08x40 { struct v4l2_ctrl *hblank; struct v4l2_ctrl *exposure; =20 + struct clk *xvclk; + struct gpio_desc *reset_gpio; + struct regulator_bulk_data supplies[ARRAY_SIZE(ov08x40_supply_names)]; + /* Current mode */ const struct ov08x40_mode *cur_mode; =20 @@ -1303,6 +1316,61 @@ struct ov08x40 { =20 #define to_ov08x40(_sd) container_of(_sd, struct ov08x40, sd) =20 +static int ov08x40_power_on(struct device *dev) +{ + struct v4l2_subdev *sd =3D dev_get_drvdata(dev); + struct ov08x40 *ov08x =3D to_ov08x40(sd); + int ret; + + if (is_acpi_node(dev_fwnode(dev))) + return 0; + + ret =3D clk_prepare_enable(ov08x->xvclk); + if (ret < 0) { + dev_err(dev, "failed to enable xvclk\n"); + return ret; + } + + if (ov08x->reset_gpio) { + gpiod_set_value_cansleep(ov08x->reset_gpio, 1); + usleep_range(1000, 2000); + } + + ret =3D regulator_bulk_enable(ARRAY_SIZE(ov08x40_supply_names), + ov08x->supplies); + if (ret < 0) { + dev_err(dev, "failed to enable regulators\n"); + goto disable_clk; + } + + gpiod_set_value_cansleep(ov08x->reset_gpio, 0); + usleep_range(1500, 1800); + + return 0; + +disable_clk: + gpiod_set_value_cansleep(ov08x->reset_gpio, 1); + clk_disable_unprepare(ov08x->xvclk); + + return ret; +} + +static int ov08x40_power_off(struct device *dev) +{ + struct v4l2_subdev *sd =3D dev_get_drvdata(dev); + struct ov08x40 *ov08x =3D to_ov08x40(sd); + + if (is_acpi_node(dev_fwnode(dev))) + return 0; + + gpiod_set_value_cansleep(ov08x->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(ov08x40_supply_names), + ov08x->supplies); + clk_disable_unprepare(ov08x->xvclk); + + return 0; +} + /* Read registers up to 4 at a time */ static int ov08x40_read_reg(struct ov08x40 *ov08x, u16 reg, u32 len, u32 *val) @@ -2072,7 +2140,7 @@ static void ov08x40_free_controls(struct ov08x40 *ov0= 8x) mutex_destroy(&ov08x->mutex); } =20 -static int ov08x40_check_hwcfg(struct device *dev) +static int ov08x40_check_hwcfg(struct ov08x40 *ov08x, struct device *dev) { struct v4l2_fwnode_endpoint bus_cfg =3D { .bus_type =3D V4L2_MBUS_CSI2_DPHY @@ -2086,11 +2154,36 @@ static int ov08x40_check_hwcfg(struct device *dev) if (!fwnode) return -ENXIO; =20 - ret =3D fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", - &xvclk_rate); - if (ret) { - dev_err(dev, "can't get clock frequency"); - return ret; + if (!is_acpi_node(fwnode)) { + ov08x->xvclk =3D devm_clk_get(dev, NULL); + if (IS_ERR(ov08x->xvclk)) { + dev_err(dev, "could not get xvclk clock (%pe)\n", + ov08x->xvclk); + return PTR_ERR(ov08x->xvclk); + } + + xvclk_rate =3D clk_get_rate(ov08x->xvclk); + + ov08x->reset_gpio =3D devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_LOW); + if (IS_ERR(ov08x->reset_gpio)) + return PTR_ERR(ov08x->reset_gpio); + + for (i =3D 0; i < ARRAY_SIZE(ov08x40_supply_names); i++) + ov08x->supplies[i].supply =3D ov08x40_supply_names[i]; + + ret =3D devm_regulator_bulk_get(dev, + ARRAY_SIZE(ov08x40_supply_names), + ov08x->supplies); + if (ret) + return ret; + } else { + ret =3D fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", + &xvclk_rate); + if (ret) { + dev_err(dev, "can't get clock frequency"); + return ret; + } } =20 if (xvclk_rate !=3D OV08X40_XVCLK) { @@ -2143,32 +2236,37 @@ static int ov08x40_check_hwcfg(struct device *dev) } =20 static int ov08x40_probe(struct i2c_client *client) -{ - struct ov08x40 *ov08x; +{ struct ov08x40 *ov08x; int ret; bool full_power; =20 + ov08x =3D devm_kzalloc(&client->dev, sizeof(*ov08x), GFP_KERNEL); + if (!ov08x) + return -ENOMEM; + /* Check HW config */ - ret =3D ov08x40_check_hwcfg(&client->dev); + ret =3D ov08x40_check_hwcfg(ov08x, &client->dev); if (ret) { dev_err(&client->dev, "failed to check hwcfg: %d", ret); return ret; } =20 - ov08x =3D devm_kzalloc(&client->dev, sizeof(*ov08x), GFP_KERNEL); - if (!ov08x) - return -ENOMEM; - /* Initialize subdev */ v4l2_i2c_subdev_init(&ov08x->sd, client, &ov08x40_subdev_ops); =20 full_power =3D acpi_dev_state_d0(&client->dev); if (full_power) { + ret =3D ov08x40_power_on(&client->dev); + if (ret) { + dev_err(&client->dev, "failed to power on\n"); + return ret; + } + /* Check module identity */ ret =3D ov08x40_identify_module(ov08x); if (ret) { dev_err(&client->dev, "failed to find sensor: %d\n", ret); - return ret; + goto probe_power_off; } } =20 @@ -2177,7 +2275,7 @@ static int ov08x40_probe(struct i2c_client *client) =20 ret =3D ov08x40_init_controls(ov08x); if (ret) - return ret; + goto probe_power_off; =20 /* Initialize subdev */ ov08x->sd.internal_ops =3D &ov08x40_internal_ops; @@ -2210,6 +2308,9 @@ static int ov08x40_probe(struct i2c_client *client) error_handler_free: ov08x40_free_controls(ov08x); =20 +probe_power_off: + ov08x40_power_off(&client->dev); + return ret; } =20 @@ -2224,6 +2325,8 @@ static void ov08x40_remove(struct i2c_client *client) =20 pm_runtime_disable(&client->dev); pm_runtime_set_suspended(&client->dev); + + ov08x40_power_off(&client->dev); } =20 #ifdef CONFIG_ACPI @@ -2235,10 +2338,17 @@ static const struct acpi_device_id ov08x40_acpi_ids= [] =3D { MODULE_DEVICE_TABLE(acpi, ov08x40_acpi_ids); #endif =20 +static const struct of_device_id ov08x40_of_match[] =3D { + { .compatible =3D "ovti,ov08x40" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ov08x40_of_match); + static struct i2c_driver ov08x40_i2c_driver =3D { .driver =3D { .name =3D "ov08x40", .acpi_match_table =3D ACPI_PTR(ov08x40_acpi_ids), + .of_match_table =3D ov08x40_of_match, }, .probe =3D ov08x40_probe, .remove =3D ov08x40_remove, --=20 2.46.2