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charset="utf-8" Add compatibles string for the Sophgo SG2044 uarts. Signed-off-by: Inochi Amaoto Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml= b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 4cdb0dcaccf3..6963f89a1848 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -58,6 +58,10 @@ properties: - brcm,bcm11351-dw-apb-uart - brcm,bcm21664-dw-apb-uart - const: snps,dw-apb-uart + - items: + - enum: + - sophgo,sg2044-uart + - const: snps,dw-apb-uart - items: - enum: - starfive,jh7100-hsuart --=20 2.47.0 From nobody Wed Nov 27 13:06:24 2024 Received: from mail-pl1-f171.google.com (mail-pl1-f171.google.com [209.85.214.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FDD81E500C; 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Wed, 09 Oct 2024 16:39:21 -0700 (PDT) Received: from localhost ([2001:da8:7001:11::cb]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20c138ced26sm75786245ad.74.2024.10.09.16.39.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Oct 2024 16:39:21 -0700 (PDT) From: Inochi Amaoto To: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Andy Shevchenko , Chen Wang , Inochi Amaoto Cc: Yixun Lan , Inochi Amaoto , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk Date: Thu, 10 Oct 2024 07:39:06 +0800 Message-ID: <20241009233908.153188-3-inochiama@gmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241009233908.153188-1-inochiama@gmail.com> References: <20241009233908.153188-1-inochiama@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" SG2044 relys on an internal divisor when calculating bitrate, which means a wrong clock for the most common bitrates. So add a quirk for this uart device to skip the set rate call and only relys on the internal UART divisor. Signed-off-by: Inochi Amaoto --- drivers/tty/serial/8250/8250_dw.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index ab9e7f204260..6b7c75670f29 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -750,6 +750,11 @@ static const struct dw8250_platform_data dw8250_renesa= s_rzn1_data =3D { .quirks =3D DW_UART_QUIRK_CPR_VALUE | DW_UART_QUIRK_IS_DMA_FC, }; =20 +static const struct dw8250_platform_data dw8250_sophgo_sg2044_data =3D { + .usr_reg =3D DW_UART_USR, + .quirks =3D DW_UART_QUIRK_SKIP_SET_RATE, +}; + static const struct dw8250_platform_data dw8250_starfive_jh7100_data =3D { .usr_reg =3D DW_UART_USR, .quirks =3D DW_UART_QUIRK_SKIP_SET_RATE, @@ -760,6 +765,7 @@ static const struct of_device_id dw8250_of_match[] =3D { { .compatible =3D "cavium,octeon-3860-uart", .data =3D &dw8250_octeon_386= 0_data }, { .compatible =3D "marvell,armada-38x-uart", .data =3D &dw8250_armada_38x= _data }, { .compatible =3D "renesas,rzn1-uart", .data =3D &dw8250_renesas_rzn1_dat= a }, + { .compatible =3D "sophgo,sg2044-uart", .data =3D &dw8250_sophgo_sg2044_d= ata }, { .compatible =3D "starfive,jh7100-uart", .data =3D &dw8250_starfive_jh71= 00_data }, { /* Sentinel */ } }; --=20 2.47.0