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AJvYcCVufpgBS3ob94bH0ZZITfFbj1yrDdv5k5beJAtVP5CWdbWT6KV0rvgo1Va3EDZ8ON3ahgHJgri9c/KEnadf@vger.kernel.org, AJvYcCWdPAdDNcQQ79ye5q/iyiPpdOX2NG2TDFmy5Ug0Eys3P0cpz7RCWUCmWMQq4dr3ZEUYNDRHQVMv2/df@vger.kernel.org X-Gm-Message-State: AOJu0YxxhoRhNFZDEpgp39MEmISUoAy18LYRIpixGhU+Hdj2sfWN1zaG JwmjD3LprP4YA92annBEsKidURU3knFYW1Pl9IB3YrgCFgkv0zn8 X-Google-Smtp-Source: AGHT+IEKuoY00MBONYoYEZvNUwHwFgGZe++kurc8BivmtPoW128dTz3seqWpdUhyU5wFto11gZmpkA== X-Received: by 2002:a17:903:189:b0:20b:b0c1:712b with SMTP id d9443c01a7336-20c63726b02mr69101965ad.15.1728513877101; Wed, 09 Oct 2024 15:44:37 -0700 (PDT) Received: from localhost ([2001:da8:7001:11::cb]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20c1393107asm75591135ad.156.2024.10.09.15.44.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Oct 2024 15:44:36 -0700 (PDT) From: Inochi Amaoto To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Peter Zijlstra , Chen Wang , Inochi Amaoto , Guo Ren , Lad Prabhakar , Heikki Krogerus , Yangyu Chen , Jinyu Tang , Hal Feng , Geert Uytterhoeven Cc: Yixun Lan , Inochi Amaoto , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI Date: Thu, 10 Oct 2024 06:44:07 +0800 Message-ID: <20241009224410.53188-2-inochiama@gmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241009224410.53188-1-inochiama@gmail.com> References: <20241009224410.53188-1-inochiama@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Sophgo SG2044 has a new version of T-HEAD C920, which implement a fully featured ACLINT device. This ACLINT has an extra SSWI field to support fast S-mode IPI. Add necessary compatible string for the T-HEAD ACLINT sswi device. Signed-off-by: Inochi Amaoto Reviewed-by: Conor Dooley --- .../thead,c900-aclint-sswi.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/= thead,c900-aclint-sswi.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c= 900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controll= er/thead,c900-aclint-sswi.yaml new file mode 100644 index 000000000000..0106fbf3ea1f --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-acl= int-sswi.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-= sswi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo sg2044 ACLINT Supervisor-level Software Interrupt Device + +maintainers: + - Inochi Amaoto + +description: + The SSWI device is a part of the riscv ACLINT device. It provides + supervisor-level IPI functionality for a set of HARTs on a RISC-V + platform. It provides a register to set an IPI (SETSSIP) for each + HART connected to the SSWI device. + +properties: + compatible: + items: + - enum: + - sophgo,sg2044-aclint-sswi + - const: thead,c900-aclint-sswi + + reg: + maxItems: 1 + + "#interrupt-cells": + const: 0 + + interrupt-controller: true + + interrupts-extended: + minItems: 1 + maxItems: 4095 + +additionalProperties: false + +required: + - compatible + - reg + - "#interrupt-cells" + - interrupt-controller + - interrupts-extended + +examples: + - | + interrupt-controller@94000000 { + compatible =3D "sophgo,sg2044-aclint-sswi", "thead,c900-aclint-sswi"; + reg =3D <0x94000000 0x00004000>; + #interrupt-cells =3D <0>; + interrupt-controller; + interrupts-extended =3D <&cpu1intc 1>, + <&cpu2intc 1>, + <&cpu3intc 1>, + <&cpu4intc 1>; + }; +... --=20 2.47.0