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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv3 1/5] ARM: dts: qcom: ipq4019: use nvmem-layout Date: Wed, 9 Oct 2024 14:48:43 -0700 Message-ID: <20241009214847.67188-2-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241009214847.67188-1-rosenp@gmail.com> References: <20241009214847.67188-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/= boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi index 0d23c03fae33..a6d4390efa7c 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi @@ -166,16 +166,19 @@ partition@170000 { label =3D "ART"; reg =3D <0x00170000 0x00010000>; read-only; - compatible =3D "nvmem-cells"; - #address-cells =3D <1>; - #size-cells =3D <1>; =20 - precal_art_1000: precal@1000 { - reg =3D <0x1000 0x2f20>; - }; + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + precal_art_1000: precal@1000 { + reg =3D <0x1000 0x2f20>; + }; =20 - precal_art_5000: precal@5000 { - reg =3D <0x5000 0x2f20>; + precal_art_5000: precal@5000 { + reg =3D <0x5000 0x2f20>; + }; }; }; =20 --=20 2.46.2 From nobody Wed Nov 27 12:58:23 2024 Received: from mail-pg1-f174.google.com (mail-pg1-f174.google.com [209.85.215.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 469EB1E47BC; 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Wed, 09 Oct 2024 14:48:57 -0700 (PDT) Received: from ryzen.lan ([2601:644:8200:dab8::a86]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e2a5707cacsm2250091a91.21.2024.10.09.14.48.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Oct 2024 14:48:57 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv3 2/5] arm64: dts: bcm4908: nvmem-layout conversion Date: Wed, 9 Oct 2024 14:48:44 -0700 Message-ID: <20241009214847.67188-3-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241009214847.67188-1-rosenp@gmail.com> References: <20241009214847.67188-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts= b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts index 999d93730240..a5f9ec92bd5e 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts @@ -144,16 +144,20 @@ partitions { #size-cells =3D <1>; =20 partition@0 { - compatible =3D "nvmem-cells"; label =3D "cferom"; reg =3D <0x0 0x100000>; - #address-cells =3D <1>; #size-cells =3D <1>; ranges =3D <0 0x0 0x100000>; =20 - base_mac_addr: mac@106a0 { - reg =3D <0x106a0 0x6>; + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + base_mac_addr: mac@106a0 { + reg =3D <0x106a0 0x6>; + }; }; }; =20 --=20 2.46.2 From nobody Wed Nov 27 12:58:23 2024 Received: from mail-pg1-f174.google.com (mail-pg1-f174.google.com [209.85.215.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7EA511E5719; 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Wed, 09 Oct 2024 14:49:00 -0700 (PDT) Received: from ryzen.lan ([2601:644:8200:dab8::a86]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e2a5707cacsm2250091a91.21.2024.10.09.14.48.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Oct 2024 14:49:00 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv3 3/5] arm64: dts: armada-3720-gl-mv1000: use nvmem-layout Date: Wed, 9 Oct 2024 14:48:45 -0700 Message-ID: <20241009214847.67188-4-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241009214847.67188-1-rosenp@gmail.com> References: <20241009214847.67188-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../dts/marvell/armada-3720-gl-mv1000.dts | 30 +++++++++---------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/a= rm64/boot/dts/marvell/armada-3720-gl-mv1000.dts index 56930f2ce481..7b801b60862d 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -98,10 +98,24 @@ partition@f0000 { reg =3D <0xf0000 0x8000>; }; =20 - factory: partition@f8000 { + partition@f8000 { label =3D "factory"; reg =3D <0xf8000 0x8000>; read-only; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + macaddr_factory_0: macaddr@0 { + reg =3D <0x0 0x6>; + }; + + macaddr_factory_6: macaddr@6 { + reg =3D <0x6 0x6>; + }; + }; }; =20 partition@100000 { @@ -221,17 +235,3 @@ fixed-link { full-duplex; }; }; - -&factory { - compatible =3D "nvmem-cells"; - #address-cells =3D <1>; - #size-cells =3D <1>; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv3 4/5] arm64: dts: mediatek: 7886cax: use nvmem-layout Date: Wed, 9 Oct 2024 14:48:46 -0700 Message-ID: <20241009214847.67188-5-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241009214847.67188-1-rosenp@gmail.com> References: <20241009214847.67188-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts b/= arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts index 08b3b0827436..9a6625d8660f 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts @@ -121,7 +121,6 @@ partition@100000 { }; =20 partition@180000 { - compatible =3D "nvmem-cells"; reg =3D <0x180000 0x200000>; label =3D "factory"; read-only; --=20 2.46.2 From nobody Wed Nov 27 12:58:23 2024 Received: from mail-pg1-f171.google.com (mail-pg1-f171.google.com [209.85.215.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 508481E283D; Wed, 9 Oct 2024 21:49:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728510548; cv=none; b=E2neXGJ+OoxSLGXQEjGvqw7oFkBKLzyp99ucjnlLiaPnJDtnc8D3wixrdG5Qpg/dhoXA3zscpDBz5g8FZU4NJzYl5ZXQqdYsn6JzewuownVFjGCkfXH3Cwk/1rKpzv0oJScx64ORWgoVbbt07rsdUJ1TYotSItN+4l5Hf4KQMmk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728510548; c=relaxed/simple; bh=8/V4mCz60Djcp4rXiN2Qk3GZR0mXJBHEXRg8u/t1mVQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rMu6MF2HsTS8oZIUCZvtI6ytujfqDFgRZHzDEhKmPBLzOyMQ01aSRdfxLe2F1BP8Q41m8MAA2MHKjS6Qn1PEL9w73iK58O38QMo0X9N9B8PZ6b+hxaQqBL99kebxEGs+9CB9ZPZex7AwxYS9q+DO0Jln3h85UFsG7KI0xeOgiMo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=iu6/xZ8o; arc=none smtp.client-ip=209.85.215.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iu6/xZ8o" Received: by mail-pg1-f171.google.com with SMTP id 41be03b00d2f7-7e9ad969a4fso154605a12.3; Wed, 09 Oct 2024 14:49:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1728510546; x=1729115346; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=omks9Q4h4Sk44JoHLzJxf+QUQKqJEvhZ1YL1d9UMfmc=; b=iu6/xZ8oD01Y5fu/OPbtoMcqkL0VNgebj6qEso0TRaFXeUg4FB1oiP7q7wMIsIlwvA tWTkHy+iRdRML6z2ib1Edr/61DvC2UTEDVhNLHrt6RijQHOljTBpAO2QZYvB4s+mtbE0 0fvrTYueOP+ufY19BrdJsse10ArI/ngcsr8EoEPHAF5MQQcYZjyBTiWgnXpE5P/HU1ZB 144xD+PJxf/HcXb0iyRJNPVPr41cASOLIMpuzqSZhMZQRfN53bRpszw5F4ggRinlQ4QB vDABk2rxgQRqC2PoYcJimXQo7wn+w/ozHBpwkKjCCV5bpTaSNi9U1WBmM9pwqM+4znZC HqFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728510546; x=1729115346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=omks9Q4h4Sk44JoHLzJxf+QUQKqJEvhZ1YL1d9UMfmc=; b=R8aLh/X0nci8nEGsrELjt5071xQHMFGQDca1IaBLX4p443T1m0vbxa1JOWgf2WAISJ 1TIz0qnAzcvNMymBORUA5U/ivUCbztaEMrkXDmlTKLaCNM17QfxJBuGtUCCkOajeakZ6 /yGqaoJrzVMTsa+jIVydRwOLPXmXcMuaed6kC9nXV3sDayjQwmv4ohVgpPdskbnxFTPv T8T1b88PAGFHvfRiac7vYxrO45ZM5BiT7Vy1cctvpul1/5SyCdZu7yWKBHQQb382Wctk nCRhz+j3IKoOXz5bJ/HrwhY+O9pBv1o/ewDTtwxdX2GVmuDK6Bz/tMdqIwu6/OeW6oz8 ytHA== X-Forwarded-Encrypted: i=1; AJvYcCUGvfrpiYwZR0Kf4bx95Meywc2PBmp61lq1lSTXU+uKn/QxY5Ks62aW5jHasimdsH1Nu8J9gItix1POPfmK@vger.kernel.org, AJvYcCUjUJY4M0f8jAqzgj30J5Uz+ch3gLqoHpM5P4ax8wc5nEbsCChElAsEiw/GpEjUYr8R1S9bgiNQMxhOkkqI@vger.kernel.org, AJvYcCWFW2xAwq4xjyrkjqsoRIeEhRGTGIn3Lnt9PANq58uDLybE9YAklKFg7URDoTc55++MLiAe43Y2@vger.kernel.org X-Gm-Message-State: AOJu0YwCRtaVCQIJntNm6lSCLiIAfwVMK/THLhsIDarj87sACSwcX/RG QB+6OXV43C38s8HncX6rEt4dhB4hFyr4CtL9Lf94mlFOxTjAmqCWXompKjwp X-Google-Smtp-Source: AGHT+IGJTDWb4p1RVq8AM/pshnbsRHxFVfsJRJKLsj6ouxokCYwq4RiFeILnKKSnnCg/FTOOAbILsQ== X-Received: by 2002:a17:90a:fe82:b0:2c9:6a38:54e4 with SMTP id 98e67ed59e1d1-2e2a2599211mr4000173a91.41.1728510546505; Wed, 09 Oct 2024 14:49:06 -0700 (PDT) Received: from ryzen.lan ([2601:644:8200:dab8::a86]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e2a5707cacsm2250091a91.21.2024.10.09.14.49.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Oct 2024 14:49:06 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv3 5/5] documentation: use nvmem-layout in examples Date: Wed, 9 Oct 2024 14:48:47 -0700 Message-ID: <20241009214847.67188-6-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241009214847.67188-1-rosenp@gmail.com> References: <20241009214847.67188-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-cells are deprecated and replaced with nvmem-layout. For these examples, replace. They're not relevant to the main point of the document anyway. Signed-off-by: Rosen Penev --- .../mtd/partitions/qcom,smem-part.yaml | 21 +++++++++++-------- .../bindings/net/marvell,aquantia.yaml | 13 +++++++----- 2 files changed, 20 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-par= t.yaml b/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.ya= ml index 1c2b4e780ca9..c2cc11286d80 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml @@ -23,7 +23,7 @@ properties: =20 patternProperties: "^partition-[0-9a-z]+$": - $ref: nvmem-cells.yaml + $ref: nvmem-layout.yaml =20 required: - compatible @@ -45,17 +45,20 @@ examples: compatible =3D "qcom,smem-part"; =20 partition-art { - compatible =3D "nvmem-cells"; - #address-cells =3D <1>; - #size-cells =3D <1>; label =3D "0:art"; =20 - macaddr_art_0: macaddr@0 { - reg =3D <0x0 0x6>; - }; + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + macaddr_art_0: macaddr@0 { + reg =3D <0x0 0x6>; + }; =20 - macaddr_art_6: macaddr@6 { - reg =3D <0x6 0x6>; + macaddr_art_6: macaddr@6 { + reg =3D <0x6 0x6>; + }; }; }; }; diff --git a/Documentation/devicetree/bindings/net/marvell,aquantia.yaml b/= Documentation/devicetree/bindings/net/marvell,aquantia.yaml index 9854fab4c4db..5d118553228b 100644 --- a/Documentation/devicetree/bindings/net/marvell,aquantia.yaml +++ b/Documentation/devicetree/bindings/net/marvell,aquantia.yaml @@ -98,15 +98,18 @@ examples: /* ... */ =20 partition@650000 { - compatible =3D "nvmem-cells"; label =3D "0:ethphyfw"; reg =3D <0x650000 0x80000>; read-only; - #address-cells =3D <1>; - #size-cells =3D <1>; =20 - aqr_fw: aqr_fw@0 { - reg =3D <0x0 0x5f42a>; + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + aqr_fw: aqr_fw@0 { + reg =3D <0x0 0x5f42a>; + }; }; }; =20 --=20 2.46.2