From nobody Wed Nov 27 16:34:31 2024 Received: from mail.fris.de (mail.fris.de [116.203.77.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 080AC1E00B0; Tue, 8 Oct 2024 14:46:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.203.77.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728398808; cv=none; b=jwczSQp4aUfEUT8qS87atuqrIMSWMmOKTp5TsMMsnGZLIcWnS9ccBwmU+MnRTCYu9dK37vAxvTALWldP55Iss3tTqARRX6ZbU7bkUP5gvOCNjjCSMU/EOlN4QONYcuz22IcfQm6VAUwqSDio5RyDDlk1T+IzT0pd7S0AxAEQ6OA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728398808; c=relaxed/simple; bh=kT3NhxvfHxuqPkC4RI3HFR331tknzG2lE1lDQioM8FU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RTNGolJi/a6r2/ijkqsTPvYjc73zFBHrSBZzAroRTND1xKvcXzibjpvxpluW22keEN0w+fonI4HXXHoOyqZF71SEE0yQcgmXMZPdR+/qtwBWyOI7HKwm6ag171z3BeLIdeMvxBKUtu4lWdpMZtN5iXIR7DyL9Zi9ii65D7qP2Rg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=fris.de; spf=fail smtp.mailfrom=fris.de; arc=none smtp.client-ip=116.203.77.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=fris.de Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=fris.de Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 68F52BFB3E; Tue, 8 Oct 2024 16:38:38 +0200 (CEST) From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Krzysztof Kozlowski , linux-kernel@vger.kernel.org, Rob Herring Cc: Frieder Schrempf , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Linus Walleij , Neil Armstrong , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Subject: [PATCH v3 1/4] dt-bindings: vendor-prefixes: Add Jenson Display Date: Tue, 8 Oct 2024 16:37:43 +0200 Message-ID: <20241008143804.126795-2-frieder@fris.de> In-Reply-To: <20241008143804.126795-1-frieder@fris.de> References: <20241008143804.126795-1-frieder@fris.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" From: Frieder Schrempf Add vendor prefix for manufacturer Jenson Display (http://jensondisplay.com= ). Signed-off-by: Frieder Schrempf Acked-by: Krzysztof Kozlowski --- Changes for v3: * Add A-b tag from Krzysztof (thanks!) Changes for v2: * Add link to commit message --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index a70ce43b3dc03..2b483eb5e364c 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -750,6 +750,8 @@ patternProperties: description: Japan Display Inc. "^jedec,.*": description: JEDEC Solid State Technology Association + "^jenson,.*": + description: Jenson Display Co. Ltd. "^jesurun,.*": description: Shenzhen Jesurun Electronics Business Dept. "^jethome,.*": --=20 2.46.0 From nobody Wed Nov 27 16:34:31 2024 Received: from mail.fris.de (mail.fris.de [116.203.77.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 081601E00B3; Tue, 8 Oct 2024 14:46:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.203.77.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728398808; cv=none; b=iVlbN7YFSMi2bh2ge62+JCe8CpyG3oPRJbcvgRRVDIySaGnQI4j1rMHxsNBki1ZU8pqLGXOVYdjP43fdR6BdNGQOBt2rfgrylpp1AcFEqmOzzbZML3T5MOd496kP2k4WaJY5B21+ts6GuabHf6zSKLqswFUh9UAopWrxW7MwbGs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728398808; c=relaxed/simple; bh=sLKCCG8NFJ1zbby5odQrkInQlu0JltXoOhgocXbBh94=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SPzMoqLE/ZQ2LuK+tJiGefui1AMIy0UgyIMLuxYELpt/oEfwTChpIwgwBEBEb42pouBecfore9KbNq9YFP18iS3CsmZsorWKTEF5xJuN9+KumMCRWiClwPgXJ3k7NcKmTVDo8rx6ScymTes9PxXabA3ZFdiHPR8jYL8+VFe76lE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=fris.de; spf=fail smtp.mailfrom=fris.de; arc=none smtp.client-ip=116.203.77.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=fris.de Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=fris.de Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 6E062BFB47; Tue, 8 Oct 2024 16:38:40 +0200 (CEST) From: Frieder Schrempf To: Conor Dooley , Daniel Vetter , David Airlie , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, Krzysztof Kozlowski , Lad Prabhakar , Laurent Pinchart , linux-kernel@vger.kernel.org, Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Rob Herring , Thierry Reding , Thomas Zimmermann Cc: Frieder Schrempf , Conor Dooley , Heiko Stuebner , Jessica Zhang , Raphael Gallais-Pou Subject: [PATCH v3 2/4] dt-bindings: display: panel-lvds: Add compatible for Jenson BL-JT60050-01A Date: Tue, 8 Oct 2024 16:37:44 +0200 Message-ID: <20241008143804.126795-3-frieder@fris.de> In-Reply-To: <20241008143804.126795-1-frieder@fris.de> References: <20241008143804.126795-1-frieder@fris.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" From: Frieder Schrempf The Jenson BL-JT60050-01A is a 7" 1024x600 LVDS display. Signed-off-by: Frieder Schrempf Acked-by: Conor Dooley --- Changes for v3: * none Changes for v2: * Add tag from Conor (thanks!) --- Documentation/devicetree/bindings/display/panel/panel-lvds.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yam= l b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml index 155d8ffa8f6ef..5af2d69300751 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml @@ -50,6 +50,8 @@ properties: - hannstar,hsd101pww2 # Hydis Technologies 7" WXGA (800x1280) TFT LCD LVDS panel - hydis,hv070wx2-1e0 + # Jenson Display BL-JT60050-01A 7" WSVGA (1024x600) color TFT LC= D LVDS panel + - jenson,bl-jt60050-01a - tbs,a711-panel =20 - const: panel-lvds --=20 2.46.0 From nobody Wed Nov 27 16:34:31 2024 Received: from mail.fris.de (mail.fris.de [116.203.77.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C31F51E0483; Tue, 8 Oct 2024 14:46:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.203.77.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728398809; cv=none; b=PwNfySltEM5W9X66Zla6K54m//gT348dLwKDz2MtWUq+4WvHoN5CgGVlsCsvYJhCnyKbAbqzWBby6TTi4NMLmolXg7UvCSth31uTS/bH6KJkl8Asr4GBA4sWNdF2L80STAoyJ+ALH7qtKh1/iCyUfCNIC++4bXwKC5F+T4LKUnk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728398809; c=relaxed/simple; bh=UUutSx+gDrSV47eLsMwHxM5rwhM3H7WeUMuQZmxxPsU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gPyxbyHI2sZS5Tnj7mJvYMg3+jMmCUeh+CuYJCMYT+UQSdArac9LcxkxlK7/ZHrHheKyXS3on5gVTToREF9jvFhPJUVbkIlVOf9DL5iKnFAnc0xZLESrN3VNA3z97bDz0vU6zryz/Z8EBmrZc1y0j+muujH8KCx/WVg7gxetjOM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=fris.de; spf=fail smtp.mailfrom=fris.de; arc=none smtp.client-ip=116.203.77.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=fris.de Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=fris.de Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 19DE2BFB5A; Tue, 8 Oct 2024 16:38:42 +0200 (CEST) From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, imx@lists.linux.dev, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Frieder Schrempf , Fabio Estevam , Pengutronix Kernel Team Subject: [PATCH v3 3/4] arm64: dts: imx8mm-kontron: Add support for display bridges on BL i.MX8MM Date: Tue, 8 Oct 2024 16:37:45 +0200 Message-ID: <20241008143804.126795-4-frieder@fris.de> In-Reply-To: <20241008143804.126795-1-frieder@fris.de> References: <20241008143804.126795-1-frieder@fris.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" From: Frieder Schrempf The Kontron Electronics BL i.MX8MM has oboard disply bridges for DSI->HDMI and DSI->LVDS conversion. The DSI interface is muxed by a GPIO-controlled switch to one of these two bridges. By default the HDMI bridge is enabled. The LVDS bridge can be selected by loading an additional (panel-specific) overlay. Signed-off-by: Frieder Schrempf --- Changes for v3: * none Changes for v2: * Remove blank lines from hdmi node * Fix order of lvds and hdmi nodes within i2c * Remove the unneeded deletion of samsung,pll-clock-frequency * Use the existing MIPI DSI output port from imx8mm.dtsi --- .../boot/dts/freescale/imx8mm-kontron-bl.dts | 131 ++++++++++++++++++ 1 file changed, 131 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts b/arch/arm= 64/boot/dts/freescale/imx8mm-kontron-bl.dts index aab8e24216501..a8ef4fba16a9e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts @@ -25,6 +25,17 @@ osc_can: clock-osc-can { clock-output-names =3D "osc-can"; }; =20 + hdmi-out { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_in_conn: endpoint { + remote-endpoint =3D <&bridge_out_conn>; + }; + }; + }; + leds { compatible =3D "gpio-leds"; pinctrl-names =3D "default"; @@ -132,6 +143,86 @@ ethphy: ethernet-phy@0 { }; }; =20 +&gpio4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio4>; + + dsi_mux_sel_hdmi: dsi-mux-sel-hdmi-hog { + gpio-hog; + gpios =3D <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "dsi-mux-sel"; + }; + + dsi_mux_sel_lvds: dsi-mux-sel-lvds-hog { + gpio-hog; + gpios =3D <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name =3D "dsi-mux-sel"; + status =3D "disabled"; + }; + + dsi-mux-oe-hog { + gpio-hog; + gpios =3D <15 GPIO_ACTIVE_LOW>; + output-high; + line-name =3D "dsi-mux-oe"; + }; +}; + +&i2c3 { + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c3>; + status =3D "okay"; + + lvds: bridge@2c { + compatible =3D "ti,sn65dsi84"; + reg =3D <0x2c>; + enable-gpios =3D <&gpio4 26 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sn65dsi84>; + status =3D "disabled"; + }; + + hdmi: hdmi@39 { + compatible =3D "adi,adv7535"; + reg =3D <0x39>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adv7535>; + adi,dsi-lanes =3D <4>; + interrupt-parent =3D <&gpio4>; + interrupts =3D <16 IRQ_TYPE_LEVEL_LOW>; + a2vdd-supply =3D <®_vdd_1v8>; + avdd-supply =3D <®_vdd_1v8>; + dvdd-supply =3D <®_vdd_1v8>; + pvdd-supply =3D <®_vdd_1v8>; + v1p2-supply =3D <®_vdd_1v8>; + v3p3-supply =3D <®_vdd_3v3>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + bridge_in_dsi_hdmi: endpoint { + remote-endpoint =3D <&mipi_dsi_out>; + }; + }; + + port@1 { + reg =3D <1>; + + bridge_out_conn: endpoint { + remote-endpoint =3D <&hdmi_in_conn>; + }; + }; + }; + }; +}; + &i2c4 { clock-frequency =3D <100000>; pinctrl-names =3D "default"; @@ -144,6 +235,19 @@ rx8900: rtc@32 { }; }; =20 +&lcdif { + status =3D "okay"; +}; + +&mipi_dsi { + samsung,esc-clock-frequency =3D <54000000>; + status =3D "okay"; +}; + +&mipi_dsi_out { + remote-endpoint =3D <&bridge_in_dsi_hdmi>; +}; + &pwm2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pwm2>; @@ -207,6 +311,12 @@ &iomuxc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio>; =20 + pinctrl_adv7535: adv7535grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x19 + >; + }; + pinctrl_can: cangrp { fsl,pins =3D < MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 @@ -277,6 +387,20 @@ MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 >; }; =20 + pinctrl_gpio4: gpio4grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x19 + MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x19 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000083 + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000083 + >; + }; + pinctrl_i2c4: i2c4grp { fsl,pins =3D < MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000083 @@ -290,6 +414,13 @@ MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19 >; }; =20 + pinctrl_sn65dsi84: sn65dsi84grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x19 + MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x19 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins =3D < MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x0 --=20 2.46.0 From nobody Wed Nov 27 16:34:31 2024 Received: from mail.fris.de (mail.fris.de [116.203.77.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD01C1DE4FC; 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dmarc=fail (p=quarantine dis=none) header.from=fris.de Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=fris.de Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 36E31BFB9D; Tue, 8 Oct 2024 16:38:46 +0200 (CEST) From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, imx@lists.linux.dev, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Frieder Schrempf , Alexander Stein , Fabio Estevam , Francesco Dolcini , Gregor Herburger , Hugo Villeneuve , Joao Paulo Goncalves , Mathieu Othacehe , Parthiban Nallathambi , Pengutronix Kernel Team Subject: [PATCH v3 4/4] arm64: dts: imx8mm-kontron: Add DL (Display-Line) overlay with LVDS support Date: Tue, 8 Oct 2024 16:37:46 +0200 Message-ID: <20241008143804.126795-5-frieder@fris.de> In-Reply-To: <20241008143804.126795-1-frieder@fris.de> References: <20241008143804.126795-1-frieder@fris.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" From: Frieder Schrempf The Kontron Electronics DL i.MX8MM consists of the BL i.MX8MM board and a 7" LVDS panel. Provide an overlay that enables the panel. Signed-off-by: Frieder Schrempf --- Changes for v3: * Fix LVDS bridge input port reference Changes for v2: * Update copyright year * Use exisitng MIPI DSI output port from imx8mm.dtsi * Fix pinctrl for GPIO hogs * Fix property order in i2c2 node * Use generic node name for touchscreen --- arch/arm64/boot/dts/freescale/Makefile | 4 + .../boot/dts/freescale/imx8mm-kontron-dl.dtso | 189 ++++++++++++++++++ 2 files changed, 193 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index f04c22b7de72e..d8af069139920 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -244,6 +244,10 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba93xxla.d= tb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx95-19x19-evk.dtb =20 +imx8mm-kontron-dl-dtbs :=3D imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo + +dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-kontron-dl.dtb + imx8mm-venice-gw72xx-0x-imx219-dtbs :=3D imx8mm-venice-gw72xx-0x.dtb imx8m= m-venice-gw72xx-0x-imx219.dtbo imx8mm-venice-gw72xx-0x-rpidsi-dtbs :=3D imx8mm-venice-gw72xx-0x.dtb imx8m= m-venice-gw72xx-0x-rpidsi.dtbo imx8mm-venice-gw72xx-0x-rs232-rts-dtbs :=3D imx8mm-venice-gw72xx-0x.dtb im= x8mm-venice-gw72xx-0x-rs232-rts.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso b/arch/ar= m64/boot/dts/freescale/imx8mm-kontron-dl.dtso new file mode 100644 index 0000000000000..1db27731b581c --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso @@ -0,0 +1,189 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Kontron Electronics GmbH + */ + +/dts-v1/; +/plugin/; + +#include +#include "imx8mm-pinfunc.h" + +&{/} { + compatible =3D "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm"; + + backlight: backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm1 0 50000 0>; + brightness-levels =3D <0 100>; + num-interpolated-steps =3D <100>; + default-brightness-level =3D <100>; + }; + + panel { + compatible =3D "jenson,bl-jt60050-01a", "panel-lvds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_panel>; + backlight =3D <&backlight>; + data-mapping =3D "vesa-24"; + enable-gpios =3D <&gpio3 19 GPIO_ACTIVE_HIGH>; + height-mm =3D <86>; + width-mm =3D <154>; + + panel-timing { + clock-frequency =3D <51200000>; + hactive =3D <1024>; + vactive =3D <600>; + hsync-len =3D <1>; + hfront-porch =3D <160>; + hback-porch =3D <160>; + vsync-len =3D <1>; + vfront-porch =3D <12>; + vback-porch =3D <23>; + }; + + port { + panel_out_bridge: endpoint { + remote-endpoint =3D <&bridge_out_panel>; + }; + }; + }; +}; + +&dsi_mux_sel_hdmi { + status =3D "disabled"; +}; + +&dsi_mux_sel_lvds { + status =3D "okay"; +}; + +&mipi_dsi_out { + remote-endpoint =3D <&bridge_in_dsi_lvds>; +}; + +&gpio3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio3>; + + panel-rst-hog { + gpio-hog; + gpios =3D <20 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "panel-reset"; + }; + + panel-stby-hog { + gpio-hog; + gpios =3D <21 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "panel-standby"; + }; + + panel-hinv-hog { + gpio-hog; + gpios =3D <24 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "panel-horizontal-invert"; + }; + + panel-vinv-hog { + gpio-hog; + gpios =3D <25 GPIO_ACTIVE_HIGH>; + output-low; + line-name =3D "panel-vertical-invert"; + }; +}; + +&hdmi { + status =3D "disabled"; +}; + +&i2c2 { + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + touchscreen@5d { + compatible =3D "goodix,gt928"; + reg =3D <0x5d>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_touch>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <22 8>; + reset-gpios =3D <&gpio3 23 0>; + irq-gpios =3D <&gpio3 22 0>; + }; +}; + +&lvds { + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + bridge_in_dsi_lvds: endpoint { + remote-endpoint =3D <&mipi_dsi_out>; + data-lanes =3D <1 2>; + }; + }; + + port@2 { + reg =3D <2>; + + bridge_out_panel: endpoint { + remote-endpoint =3D <&panel_out_bridge>; + }; + }; + }; +}; + +&pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pwm1>; + status =3D "okay"; +}; + +&iomuxc { + pinctrl_gpio3: gpio3grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x19 + MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 + MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 + MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000083 + MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000083 + >; + }; + + pinctrl_panel: panelgrp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x19 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins =3D < + MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x6 + >; + }; + + pinctrl_touch: touchgrp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 + MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 + >; + }; +}; --=20 2.46.0