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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Oct 2024 10:41:59.2698 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4ae8c16b-f579-408b-3ef4-08dce785d677 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5916 Content-Type: text/plain; charset="utf-8" IOMMU driver sends command to IOMMU hardware via command buffer. In cases where IOMMU hardware fails to process commands in command buffer, dumping it is a valuable input to debug the issue. IOMMU hardware processes command buffer entry at offset equals to the head pointer. Dumping just the entry at the head pointer may not always be useful. The current head may not be pointing to the entry of the command buffer which is causing the issue. IOMMU Hardware may have processed the entry and updated the head pointer. So dumping the entire command buffer gives a broad understanding of what hardware was/is doing. The command buffer dump will have all entries from start to end of the command buffer. Along with that, it will have a head and tail command buffer pointer register dump to facilitate where the IOMMU driver and hardware are in the command buffer for injecting and processing the entries respectively. Command buffer is a per IOMMU data structure. So dumping on per IOMMU basis. eg. To get command buffer dump for iommu #cat /sys/kernel/debug/iommu/amd/iommu/cmdbuf Signed-off-by: Dheeraj Kumar Srivastava --- drivers/iommu/amd/amd_iommu_types.h | 7 +++++++ drivers/iommu/amd/debugfs.c | 27 +++++++++++++++++++++++++++ drivers/iommu/amd/iommu.c | 7 ------- 3 files changed, 34 insertions(+), 7 deletions(-) diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_io= mmu_types.h index 601fb4ee6900..876fa671ef91 100644 --- a/drivers/iommu/amd/amd_iommu_types.h +++ b/drivers/iommu/amd/amd_iommu_types.h @@ -878,6 +878,13 @@ extern struct list_head amd_iommu_list; */ extern struct amd_iommu *amd_iommus[MAX_IOMMUS]; =20 +/* + * Structure defining one entry in the command buffer + */ +struct iommu_cmd { + u32 data[4]; +}; + /* * Structure defining one entry in the device table */ diff --git a/drivers/iommu/amd/debugfs.c b/drivers/iommu/amd/debugfs.c index c3ef15e7b918..69d2b01bc0e4 100644 --- a/drivers/iommu/amd/debugfs.c +++ b/drivers/iommu/amd/debugfs.c @@ -159,6 +159,31 @@ static int iommu_capability_dump_show(struct seq_file = *m, void *unused) } DEFINE_SHOW_ATTRIBUTE(iommu_capability_dump); =20 +static int iommu_cmdbuf_show(struct seq_file *m, void *unused) +{ + struct amd_iommu *iommu =3D m->private; + struct iommu_cmd *cmd; + unsigned long flag; + u32 head, tail; + int i; + + raw_spin_lock_irqsave(&iommu->lock, flag); + + head =3D readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); + tail =3D readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); + seq_printf(m, "CMD Buffer Head pointer register:0x%08x Tail pointer regis= ter:0x%08x\n", + head, tail); + for (i =3D 0; i < CMD_BUFFER_ENTRIES; i++) { + cmd =3D (struct iommu_cmd *)(iommu->cmd_buf + i * sizeof(*cmd)); + seq_printf(m, "%3d: %08x%08x%08x%08x\n", i, cmd->data[0], + cmd->data[1], cmd->data[2], cmd->data[3]); + } + raw_spin_unlock_irqrestore(&iommu->lock, flag); + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(iommu_cmdbuf); + void amd_iommu_debugfs_setup(void) { struct amd_iommu *iommu; @@ -178,5 +203,7 @@ void amd_iommu_debugfs_setup(void) &iommu_capability_fops); debugfs_create_file("capability_dump", 0444, iommu->debugfs, iommu, &iommu_capability_dump_fops); + debugfs_create_file("cmdbuf", 0444, iommu->debugfs, iommu, + &iommu_cmdbuf_fops); } } diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 8364cd6fa47d..efc2d1ddd7cc 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -63,13 +63,6 @@ static const struct iommu_dirty_ops amd_dirty_ops; =20 int amd_iommu_max_glx_val =3D -1; =20 -/* - * general struct to manage commands send to an IOMMU - */ -struct iommu_cmd { - u32 data[4]; -}; - struct kmem_cache *amd_iommu_irq_cache; =20 static void detach_device(struct device *dev); --=20 2.25.1