From nobody Wed Nov 27 20:33:50 2024 Received: from cstnet.cn (smtp21.cstnet.cn [159.226.251.21]) (using TLSv1.2 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BFA04185945; Tue, 8 Oct 2024 09:48:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=159.226.251.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728380886; cv=none; b=Ik//HkLzdhPuCNtvM2M1xTcTD154k7WrikJizza6HjGbSdbx491oNteDEVXHAephfCnfY8dQH2YXSKame8BLJmz3FGFgohFdZo/cCtuX0czXxl+pt08136pgBZqO2jxv6/fAdAoVqA/KOnAEIryQOBRkFFBnMrkG2XYMQl3WW0E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728380886; c=relaxed/simple; bh=s+Rv6mTewyGFPCZFQD2z3tBcFwHoCLecdHLKBqL4sGk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=s6rfn1pcASoj40Fd7YqZ8zRvpK1RISP1B7L+8KYLmwgxKYQEjPFn0D3nUEFqIalYP+/Su7XW3IlqwbFhaTcB4BrzH3PhpVKPJWZhINaU7pXGwNmQihdwuflk30U8zEGeZeLR2oVcPhDO+VPpw5EGPplO2H0fVeYL5o5Fgyrs/vQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn; spf=pass smtp.mailfrom=iscas.ac.cn; arc=none smtp.client-ip=159.226.251.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from ubt.. (unknown [210.73.53.31]) by APP-01 (Coremail) with SMTP id qwCowAAH7nxf_gRnEkoDBQ--.54511S3; Tue, 08 Oct 2024 17:41:52 +0800 (CST) From: Chunyan Zhang To: Palmer Dabbelt , Andrew Morton , Shuah Khan , Paul Walmsley Cc: Alexandre Ghiti , Charlie Jenkins , linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Chunyan Zhang Subject: [PATCH V2 1/4] riscv: Remove unused GENERATING_ASM_OFFSETS Date: Tue, 8 Oct 2024 17:41:38 +0800 Message-Id: <20241008094141.549248-2-zhangchunyan@iscas.ac.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241008094141.549248-1-zhangchunyan@iscas.ac.cn> References: <20241008094141.549248-1-zhangchunyan@iscas.ac.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qwCowAAH7nxf_gRnEkoDBQ--.54511S3 X-Coremail-Antispam: 1UD129KBjvdXoW7XFW5Cr1xXF47KFy7Zr4DXFb_yoWkZrb_Cw 4xWas8GryrJF4F9ay7Awn3KFs0yw1rtFyFqF4fCF95uFnIvry0kws3t3Z5Jwn7Gr17Ja93 Aa97JFZIvr1j9jkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUIcSsGvfJTRUUUb9kYjsxI4VWxJwAYFVCjjxCrM7AC8VAFwI0_Xr0_Wr1l1xkIjI8I 6I8E6xAIw20EY4v20xvaj40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7 IE14v26r18M28IrcIa0xkI8VCY1x0267AKxVW8JVW5JwA2ocxC64kIII0Yj41l84x0c7CE w4AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26r4j6ryUM28EF7xvwVC0I7IYx2IY6x kF7I0E14v26r4UJVWxJr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv 6xkF7I0E14v26rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c 02F40Ex7xfMcIj6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVW8JVWxJwAm72CE 4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41lFIxGxcIEc7CjxVA2Y2ka0xkIwI1lc7 CjxVAaw2AFwI0_Jw0_GFylc2xSY4AK67AK6r4fMxAIw28IcxkI7VAKI48JMxC20s026xCa FVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_Jr Wlx4CE17CEb7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j 6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xvaj40_Jr 0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUv cSsGvfC2KfnxnUUI43ZEXa7IU0AsqJUUUUU== X-CM-SenderInfo: x2kd0wxfkx051dq6x2xfdvhtffof0/1tbiBwwEB2cExpL0xAAAsP Content-Type: text/plain; charset="utf-8" The macro is not used in the current version of kernel, it looks like can be removed to avoid a build warning: ../arch/riscv/kernel/asm-offsets.c: At top level: ../arch/riscv/kernel/asm-offsets.c:7: warning: macro "GENERATING_ASM_OFFSET= S" is not used [-Wunused-macros] 7 | #define GENERATING_ASM_OFFSETS Fixes: 9639a44394b9 ("RISC-V: Provide a cleaner raw_smp_processor_id()") Reviewed-by: Alexandre Ghiti Tested-by: Alexandre Ghiti Signed-off-by: Chunyan Zhang --- V1: https://lore.kernel.org/lkml/20240816101912.1049329-1-zhangchunyan@isca= s.ac.cn/T/ --- arch/riscv/kernel/asm-offsets.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offset= s.c index e94180ba432f..c2f3129a8e5c 100644 --- a/arch/riscv/kernel/asm-offsets.c +++ b/arch/riscv/kernel/asm-offsets.c @@ -4,8 +4,6 @@ * Copyright (C) 2017 SiFive */ =20 -#define GENERATING_ASM_OFFSETS - #include #include #include --=20 2.34.1