From nobody Wed Nov 27 20:37:19 2024 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0F681F8EFE; Tue, 8 Oct 2024 08:15:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728375307; cv=none; b=AoL9InnacdY832s0pejFM2KZG94SM2UM2x0AitGTcFebGXvLOaS+KxeY+AFOD2nO46h8Nwf5RKIcKKbVsGD/sTq09Ql482uAlfYb5kguxmC7CpogF4E94yLpH+tvO9oP10vsL6c+CJtWKjdZabAKjqbxyyYwBH9n7xtBqsPui+w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728375307; c=relaxed/simple; bh=nt81xTMCmc+NpidNL1Z5ylz2VdW3B/V76T7FDqwl2x0=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tO7rLePhC6COeBecgkleL5Apmts3ufVRIfvRjyuLtBRLy15QejUNlaTZcRuMFYjOTfubhLDx3NAc8CV3PULyS7WHdKNebiIKcZTwq7QMS6+RFgnMczBhu1DWvVgYAp7WjemonFapmSjBokPSeloYdCKSCvQrjnC+uURh66dVvUM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Tue, 8 Oct 2024 16:14:51 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Tue, 8 Oct 2024 16:14:51 +0800 From: Billy Tsai To: , , , , , , , , , , , , , , Subject: [PATCH v7 2/7] gpio: aspeed: Use devm_clk api to manage clock source Date: Tue, 8 Oct 2024 16:14:45 +0800 Message-ID: <20241008081450.1490955-3-billy_tsai@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241008081450.1490955-1-billy_tsai@aspeedtech.com> References: <20241008081450.1490955-1-billy_tsai@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace of_clk_get with devm_clk_get_enabled to manage the clock source. Fixes: 5ae4cb94b313 ("gpio: aspeed: Add debounce support") Reviewed-by: Andrew Jeffery Signed-off-by: Billy Tsai --- drivers/gpio/gpio-aspeed.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 98551b7f6de2..ea40ad43a79b 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -1193,7 +1193,7 @@ static int __init aspeed_gpio_probe(struct platform_d= evice *pdev) if (!gpio_id) return -EINVAL; =20 - gpio->clk =3D of_clk_get(pdev->dev.of_node, 0); + gpio->clk =3D devm_clk_get_enabled(&pdev->dev, NULL); if (IS_ERR(gpio->clk)) { dev_warn(&pdev->dev, "Failed to get clock from devicetree, debouncing disabled\n"); --=20 2.25.1