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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241008-fix-sm8x50-mdp-icc-v1-1-77ffd361b8de@linaro.org> References: <20241008-fix-sm8x50-mdp-icc-v1-0-77ffd361b8de@linaro.org> In-Reply-To: <20241008-fix-sm8x50-mdp-icc-v1-0-77ffd361b8de@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong Cc: Abhinav Kumar , Rob Clark , Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, freedreno@lists.freedesktop.org, stable@kernel.org X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1572; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=YQocvzYtQugoKxgD8nHuIxgQRJHdd9/v/IZp+pC+8dE=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnBHCeEpL543RrUo9Z7rVDf0efOxV1fnhzZJITr iRfdb/o/jOJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZwRwngAKCRCLPIo+Aiko 1QFXB/4u855teCcg8ExURYV6FCQ8peftzz6joCv38Tr0CKTKHy2CcAG8NbBxqvAN2J2PSMPgvRD MRwHus6hw2GV2WLtoCv/IiAMY4c7TpHXlsVWjc+hurwgqgay2NWVJ7gBdrqlPpYPcZ/zpB7BllG SR2fqZgfMUwh2RrauwjF3c5xUxFcq/WzmVHvRg54zdDOEjQ8e1G9ANQJ8WHA6RLA/g5piIddWI8 NfO5PqNErESUpBZEuSZJaGZa/4Z5/Lcvm+Td20f8q2wY/z1wwW9ncvxdjcO9dOPzuyoXPZMceQU 98N0JCD9zH9JE3zzcJji6Shs1acdd/aVlqgkHQLt1A6OnhH/ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A SM8550 lists two interconnects for the display subsystem, mdp0-mem (between MDP and LLCC) and mdp1-mem (between LLCC and EBI, memory). The second interconnect is a misuse. mdpN-mem paths should be used for several outboud MDP interconnects rather than the path between LLCC and memory. This kind of misuse can result in bandwidth underflows, possibly degradating picture quality as the required memory bandwidth is divided between all mdpN-mem paths (and LLCC-EBI should not be a part of such division). Drop the second path and use direct MDP-EBI path for mdp0-mem until we support separate MDP-LLCC and LLCC-EBI paths. Fixes: d7da51db5b81 ("arm64: dts: qcom: sm8550: add display hardware device= s") Cc: stable@kernel.org Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 9dc0ee3eb98f..cca10f9faa14 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2871,9 +2871,8 @@ mdss: display-subsystem@ae00000 { =20 power-domains =3D <&dispcc MDSS_GDSC>; =20 - interconnects =3D <&mmss_noc MASTER_MDP 0 &gem_noc SLAVE_LLCC 0>, - <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names =3D "mdp0-mem", "mdp1-mem"; + interconnects =3D <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names =3D "mdp0-mem"; =20 iommus =3D <&apps_smmu 0x1c00 0x2>; =20 --=20 2.39.5 From nobody Wed Nov 27 22:50:51 2024 Received: from mail-lf1-f44.google.com (mail-lf1-f44.google.com [209.85.167.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44586193400 for ; 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The second interconnect is a misuse. mdpN-mem paths should be used for several outboud MDP interconnects rather than the path between LLCC and memory. This kind of misuse can result in bandwidth underflows, possibly degradating picture quality as the required memory bandwidth is divided between all mdpN-mem paths (and LLCC-EBI should not be a part of such division). Drop the second path and use direct MDP-EBI path for mdp0-mem until we support separate MDP-LLCC and LLCC-EBI paths. Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent = device nodes") Cc: stable@kernel.org Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index 01ac3769ffa6..455774516b08 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -3455,11 +3455,8 @@ mdss: display-subsystem@ae00000 { resets =3D <&dispcc DISP_CC_MDSS_CORE_BCR>; =20 interconnects =3D <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS - &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS>, - <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; - interconnect-names =3D "mdp0-mem", - "mdp1-mem"; + interconnect-names =3D "mdp0-mem"; =20 power-domains =3D <&dispcc MDSS_GDSC>; =20 --=20 2.39.5