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Lin" , Singo Chang , "Nancy Lin" , Subject: [PATCH v9 1/5] drm/mediatek: ovl: Fix XRGB format breakage for blend_modes unsupported SoCs Date: Mon, 7 Oct 2024 15:00:57 +0800 Message-ID: <20241007070101.23263-2-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20241007070101.23263-1-jason-jh.lin@mediatek.com> References: <20241007070101.23263-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--4.144300-8.000000 X-TMASE-MatchedRID: auvC3QTXpfnPl7LciQedTsDORqgKKiYqUAjrAJWsTe+CsBeCv8CM/dS/ hfkVqvWdD2EF2wJcjhei2CV2woUvEFm72EsAF82QA9lly13c/gEK3n1SHen81eO53bHtM9W3QVh QktC6mCo6Av71VIw5dIAy6p60ZV62fJ5/bZ6npdiujVRFkkVsm0KRNS3nURDdYX20ZXgGme8uSE 1WVaGxAVzM8RLhWMtt1IGf4vNKEEL3ugAbtT6cRkv95ivUjpgUh8kI3MxsG5XZAuBXdw+XWo6H7 DI0GsVcMmI24qiENwrMpIbcl3IoA+q1XYAYw09q9Z1yWryVTWo= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--4.144300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 692070F7659E55B9377DB75BF4DEBA22298D9C1AB68C9BAD0ADB1DCB47CD31722000:8 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If the constant alpha always enable, the SoCs that is not supported the ignore pixel alpha bit will still use constant alpha. That will break the original constant alpha setting of XRGB foramt for blend_modes unsupported SoCs, such as MT8173. Note that ignore pixel alpha bit is suppored if the SoC support the blend_modes. Make the constatnt alpha only enable when having a vliad blend_mode or setting the has_alpha to fix the downgrade issue. Fixes: bc46eb5d5d77 ("drm/mediatek: Support DRM plane alpha in OVL") Signed-off-by: Jason-JH.Lin Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/medi= atek/mtk_disp_ovl.c index 89b439dcf3a6..8453a72f9e59 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -473,8 +473,14 @@ void mtk_ovl_layer_config(struct device *dev, unsigned= int idx, =20 con =3D ovl_fmt_convert(ovl, fmt, blend_mode); if (state->base.fb) { - con |=3D OVL_CON_AEN; con |=3D state->base.alpha & OVL_CON_ALPHA; + + /* + * For blend_modes supported SoCs, always enable constant alpha. + * For blend_modes unsupported SoCs, enable constant alpha when has_alph= a is set. + */ + if (blend_mode || state->base.fb->format->has_alpha) + con |=3D OVL_CON_AEN; } =20 /* CONST_BLD must be enabled for XRGB formats although the alpha channel --=20 2.43.0