From nobody Thu Nov 28 02:45:37 2024 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFA3917622F; Mon, 7 Oct 2024 06:11:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728281483; cv=none; b=tetYB4SoRXQ1Y0vsgGQPEzl/a8Gykwcmzko/Z/GNInIC7gejXC/MgB7I8+z+Z8oNFy4nN0cWYhpMejK5OGzQ9HsGRrfeuCkcIIc/b5/n+XDXocN8mqyXa0vmLa0gYeUYuD8P6S1Kwup3NWw7JgfVjtEAjx96hxbC4twxWRvc6P4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728281483; c=relaxed/simple; bh=HoCC5Qw/m6Do5ot63vtnsIga5ViQze5iRSHGiJ8vhUw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=hMz19f9hp2lG7e0EVGaQjaU3Cy4YRtKRmHxNk6dGTuEnXEmzzdc+hpejRv34TEZCPJxEbSl0YCaruymORKGPm00/h/PlFiNTJ05QEWOwnhZsL1ipCwrIY1TI4VY4d/bc3IGl5ie682FUcFKv/kTBkDto9/mmfZSgu3TaebNM8+A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=a8xAJPO8; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="a8xAJPO8" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4974Sns9015079; Mon, 7 Oct 2024 06:11:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= OjNrPOzYonHuniAB+wNmt2DvsJDDfx4msiAlqwSv0zM=; b=a8xAJPO8ArxGCj7l j96BL45nEZfT3smpBriVDYnJx7ohCtlk3ltIwnykDNM7xaE8oOKN0YC14w5tq2v1 alL9RBFJinuf+3wNjBj7e7vBiLlMzI5KYbuQAp4gxUU7I1oO2W0ppFt3/wrdn1/I foUy9fr6am0dOCgixvOyrv/xuMw0NH1MoAPshQ2l38ViJCxf7taBjgAsaV4G4VpJ cpiy9NKFEavM6AqC9ttdDFS+QdSHX11g6D+KQbGw28OruWN7Moj0aNbJS0bhf10k R3b3aNoU8mohaOMuVr4PHZS3xC5QHhyh9Oxf7rxYnCIj9avbNU9V/1eeJAjEl9dZ 8QBoRw== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 422xs735jp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Oct 2024 06:11:11 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4976AvZ9009300 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 7 Oct 2024 06:10:57 GMT Received: from hu-sibis-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sun, 6 Oct 2024 23:10:52 -0700 From: Sibi Sankar To: , , , , , CC: , , , , , , , , , Amir Vajid Subject: [PATCH V4 3/5] firmware: arm_scmi: vendors: Add QCOM SCMI Generic Extensions Date: Mon, 7 Oct 2024 11:40:21 +0530 Message-ID: <20241007061023.1978380-4-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241007061023.1978380-1-quic_sibis@quicinc.com> References: <20241007061023.1978380-1-quic_sibis@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 4O-uGFOFMeoiMkXRwSJTgkEmUvTfhjgC X-Proofpoint-GUID: 4O-uGFOFMeoiMkXRwSJTgkEmUvTfhjgC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 priorityscore=1501 bulkscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 spamscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410070042 Content-Type: text/plain; charset="utf-8" The QCOM SCMI Generic Extensions Protocol provides a generic way of exposing a number of Qualcomm SoC specific features (like memory bus scaling) through a mixture of pre-determined algorithm strings and param_id pairs hosted on the SCMI controller. Co-developed-by: Shivnandan Kumar Signed-off-by: Shivnandan Kumar Co-developed-by: Ramakrishna Gottimukkula Signed-off-by: Ramakrishna Gottimukkula Co-developed-by: Amir Vajid Signed-off-by: Amir Vajid Signed-off-by: Sibi Sankar Reviewed-by: Cristian Marussi --- v3: * Pick up Rb tag and fixup/re-order elements of the vendor ops [Christian] * Follow naming convention and folder structure used by IMX * Add missing enum in the vendor protocol and fix documentation [Konrad] drivers/firmware/arm_scmi/Kconfig | 1 + drivers/firmware/arm_scmi/Makefile | 1 + .../firmware/arm_scmi/vendors/qcom/Kconfig | 15 ++ .../firmware/arm_scmi/vendors/qcom/Makefile | 2 + .../arm_scmi/vendors/qcom/qcom-generic-ext.c | 184 ++++++++++++++++++ include/linux/scmi_qcom_protocol.h | 39 ++++ 6 files changed, 242 insertions(+) create mode 100644 drivers/firmware/arm_scmi/vendors/qcom/Kconfig create mode 100644 drivers/firmware/arm_scmi/vendors/qcom/Makefile create mode 100644 drivers/firmware/arm_scmi/vendors/qcom/qcom-generic-ext= .c create mode 100644 include/linux/scmi_qcom_protocol.h diff --git a/drivers/firmware/arm_scmi/Kconfig b/drivers/firmware/arm_scmi/= Kconfig index dabd874641d0..73128442d97b 100644 --- a/drivers/firmware/arm_scmi/Kconfig +++ b/drivers/firmware/arm_scmi/Kconfig @@ -71,6 +71,7 @@ config ARM_SCMI_DEBUG_COUNTERS =20 source "drivers/firmware/arm_scmi/transports/Kconfig" source "drivers/firmware/arm_scmi/vendors/imx/Kconfig" +source "drivers/firmware/arm_scmi/vendors/qcom/Kconfig" =20 endif #ARM_SCMI_PROTOCOL =20 diff --git a/drivers/firmware/arm_scmi/Makefile b/drivers/firmware/arm_scmi= /Makefile index 9ac81adff567..58cf4d656cbb 100644 --- a/drivers/firmware/arm_scmi/Makefile +++ b/drivers/firmware/arm_scmi/Makefile @@ -12,6 +12,7 @@ scmi-module-objs :=3D $(scmi-driver-y) $(scmi-protocols-y= ) $(scmi-transport-y) =20 obj-$(CONFIG_ARM_SCMI_PROTOCOL) +=3D transports/ obj-$(CONFIG_ARM_SCMI_PROTOCOL) +=3D vendors/imx/ +obj-$(CONFIG_ARM_SCMI_PROTOCOL) +=3D vendors/qcom/ =20 obj-$(CONFIG_ARM_SCMI_PROTOCOL) +=3D scmi-core.o obj-$(CONFIG_ARM_SCMI_PROTOCOL) +=3D scmi-module.o diff --git a/drivers/firmware/arm_scmi/vendors/qcom/Kconfig b/drivers/firmw= are/arm_scmi/vendors/qcom/Kconfig new file mode 100644 index 000000000000..5dd9e8a6b75f --- /dev/null +++ b/drivers/firmware/arm_scmi/vendors/qcom/Kconfig @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0-only +menu "ARM SCMI QCOM Vendor Protocols" + +config QCOM_SCMI_GENERIC_EXT + tristate "Qualcomm Technologies, Inc. Qcom SCMI vendor Protocol" + depends on ARM_SCMI_PROTOCOL || COMPILE_TEST + help + The QCOM SCMI vendor protocol provides a generic way of exposing + a number of Qualcomm SoC specific features (like memory bus scaling) + through a mixture of pre-determined algorithm strings and param_id + pairs hosted on the SCMI controller. + + This driver defines/documents the message ID's used for this + communication and also exposes the operations used by the clients. +endmenu diff --git a/drivers/firmware/arm_scmi/vendors/qcom/Makefile b/drivers/firm= ware/arm_scmi/vendors/qcom/Makefile new file mode 100644 index 000000000000..6b98fabbebb8 --- /dev/null +++ b/drivers/firmware/arm_scmi/vendors/qcom/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_QCOM_SCMI_GENERIC_EXT) +=3D qcom-generic-ext.o diff --git a/drivers/firmware/arm_scmi/vendors/qcom/qcom-generic-ext.c b/dr= ivers/firmware/arm_scmi/vendors/qcom/qcom-generic-ext.c new file mode 100644 index 000000000000..f7cd949161df --- /dev/null +++ b/drivers/firmware/arm_scmi/vendors/qcom/qcom-generic-ext.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserve= d. + */ + +#include + +#include "../../common.h" + +/** + * enum qcom_generic_ext_protocol_cmd - vendor specific commands supported= by SCMI Qualcomm + * generic vendor protocol. + * + * This protocol is intended as a generic way of exposing a number of Qual= comm SoC + * specific features through a mixture of pre-determined algorithm string = and param_id + * pairs hosted on the SCMI controller. + * + * The QCOM SCMI Vendor Protocol has the protocol id as 0x80 and vendor id= set to + * Qualcomm and the implementation version set to 0x20000. The PROTOCOL_VE= RSION command + * returns version 1.0. + * + * @QCOM_SCMI_SET_PARAM: message_id: 0x10 is used to set the parameter of = a specific algo_str + * hosted on QCOM SCMI Vendor Protocol. The tx len d= epends on the + * algo_str used. + * @QCOM_SCMI_GET_PARAM: message_id: 0x11 is used to get parameter informa= tion of a specific + * algo_str hosted on QCOM SCMI Vendor Protocol. The= tx and rx len + * depends on the algo_str used. + * @QCOM_SCMI_START_ACTIVITY: message_id: 0x12 is used to start the activi= ty performed by + * the algo_str. + * @QCOM_SCMI_STOP_ACTIVITY: message_id: 0x13 is used to stop a pre-existi= ng activity + * performed by the algo_str. + */ +enum qcom_generic_ext_protocol_cmd { + QCOM_SCMI_SET_PARAM =3D 0x10, + QCOM_SCMI_GET_PARAM =3D 0x11, + QCOM_SCMI_START_ACTIVITY =3D 0x12, + QCOM_SCMI_STOP_ACTIVITY =3D 0x13, +}; + +/** + * struct qcom_scmi_msg - represents the various parameters to be populated + * for using the QCOM SCMI Vendor Protocol + * + * @ext_id: reserved, must be zero + * @algo_low: lower 32 bits of the algo_str + * @algo_high: upper 32 bits of the algo_str + * @param_id: serves as token message id to the specific algo_str + * @buf: serves as the payload to the specified param_id and algo_str pair + */ +struct qcom_scmi_msg { + __le32 ext_id; + __le32 algo_low; + __le32 algo_high; + __le32 param_id; + __le32 buf[]; +}; + +static int qcom_scmi_set_param(const struct scmi_protocol_handle *ph, void= *buf, size_t buf_len, + u64 algo_str, u32 param_id) +{ + struct scmi_xfer *t; + struct qcom_scmi_msg *msg; + int ret; + + ret =3D ph->xops->xfer_get_init(ph, QCOM_SCMI_SET_PARAM, buf_len + sizeof= (*msg), 0, &t); + if (ret) + return ret; + + msg =3D t->tx.buf; + msg->algo_low =3D cpu_to_le32(lower_32_bits(algo_str)); + msg->algo_high =3D cpu_to_le32(upper_32_bits(algo_str)); + msg->param_id =3D cpu_to_le32(param_id); + + memcpy(msg->buf, buf, t->tx.len - sizeof(*msg)); + + ret =3D ph->xops->do_xfer(ph, t); + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int qcom_scmi_get_param(const struct scmi_protocol_handle *ph, void= *buf, size_t buf_len, + u64 algo_str, u32 param_id, size_t rx_size) +{ + struct scmi_xfer *t; + struct qcom_scmi_msg *msg; + int ret; + + ret =3D ph->xops->xfer_get_init(ph, QCOM_SCMI_GET_PARAM, buf_len + sizeof= (*msg), rx_size, &t); + if (ret) + return ret; + + msg =3D t->tx.buf; + msg->algo_low =3D cpu_to_le32(lower_32_bits(algo_str)); + msg->algo_high =3D cpu_to_le32(upper_32_bits(algo_str)); + msg->param_id =3D cpu_to_le32(param_id); + memcpy(msg->buf, buf, t->tx.len - sizeof(*msg)); + + ret =3D ph->xops->do_xfer(ph, t); + memcpy(buf, t->rx.buf, t->rx.len); + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int qcom_scmi_start_activity(const struct scmi_protocol_handle *ph,= void *buf, + size_t buf_len, u64 algo_str, u32 param_id) +{ + struct scmi_xfer *t; + struct qcom_scmi_msg *msg; + int ret; + + ret =3D ph->xops->xfer_get_init(ph, QCOM_SCMI_START_ACTIVITY, buf_len + s= izeof(*msg), 0, &t); + if (ret) + return ret; + + msg =3D t->tx.buf; + msg->algo_low =3D cpu_to_le32(lower_32_bits(algo_str)); + msg->algo_high =3D cpu_to_le32(upper_32_bits(algo_str)); + msg->param_id =3D cpu_to_le32(param_id); + + memcpy(msg->buf, buf, t->tx.len - sizeof(*msg)); + + ret =3D ph->xops->do_xfer(ph, t); + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int qcom_scmi_stop_activity(const struct scmi_protocol_handle *ph, = void *buf, + size_t buf_len, u64 algo_str, u32 param_id) +{ + struct scmi_xfer *t; + struct qcom_scmi_msg *msg; + int ret; + + ret =3D ph->xops->xfer_get_init(ph, QCOM_SCMI_STOP_ACTIVITY, buf_len + si= zeof(*msg), 0, &t); + if (ret) + return ret; + + msg =3D t->tx.buf; + msg->algo_low =3D cpu_to_le32(lower_32_bits(algo_str)); + msg->algo_high =3D cpu_to_le32(upper_32_bits(algo_str)); + msg->param_id =3D cpu_to_le32(param_id); + + memcpy(msg->buf, buf, t->tx.len - sizeof(*msg)); + + ret =3D ph->xops->do_xfer(ph, t); + ph->xops->xfer_put(ph, t); + + return ret; +} + +static struct qcom_generic_ext_ops qcom_proto_ops =3D { + .set_param =3D qcom_scmi_set_param, + .get_param =3D qcom_scmi_get_param, + .start_activity =3D qcom_scmi_start_activity, + .stop_activity =3D qcom_scmi_stop_activity, +}; + +static int qcom_generic_ext_protocol_init(const struct scmi_protocol_handl= e *ph) +{ + u32 version; + + ph->xops->version_get(ph, &version); + + dev_info(ph->dev, "QCOM Generic Vendor Version %d.%d\n", + PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); + + return 0; +} + +static const struct scmi_protocol qcom_generic_ext =3D { + .id =3D SCMI_PROTOCOL_QCOM_GENERIC, + .owner =3D THIS_MODULE, + .instance_init =3D &qcom_generic_ext_protocol_init, + .ops =3D &qcom_proto_ops, + .vendor_id =3D "Qualcomm", + .impl_ver =3D 0x20000, +}; +module_scmi_protocol(qcom_generic_ext); + +MODULE_DESCRIPTION("QCOM SCMI Generic Vendor protocol"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/scmi_qcom_protocol.h b/include/linux/scmi_qcom_p= rotocol.h new file mode 100644 index 000000000000..8f82c42e566d --- /dev/null +++ b/include/linux/scmi_qcom_protocol.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SCMI Message Protocol driver QCOM extension header + * + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserve= d. + */ + +#ifndef _LINUX_SCMI_QCOM_PROTOCOL_H +#define _LINUX_SCMI_QCOM_PROTOCOL_H + +#include +#include +#include + +#define SCMI_PROTOCOL_QCOM_GENERIC 0x80 + +struct scmi_protocol_handle; + +/** + * struct qcom_generic_ext_ops - represents the various operations provided + * by QCOM Generic Vendor Protocol + * + * @set_param: set parameter specified by param_id and algo_str pair. + * @get_param: retrieve parameter specified by param_id and algo_str pair. + * @start_activity: initiate a specific activity defined by algo_str. + * @stop_activity: halt previously initiated activity defined by algo_str. + */ +struct qcom_generic_ext_ops { + int (*set_param)(const struct scmi_protocol_handle *ph, void *buf, size_t= buf_len, + u64 algo_str, u32 param_id); + int (*get_param)(const struct scmi_protocol_handle *ph, void *buf, size_t= buf_len, + u64 algo_str, u32 param_id, size_t rx_size); + int (*start_activity)(const struct scmi_protocol_handle *ph, void *buf, s= ize_t buf_len, + u64 algo_str, u32 param_id); + int (*stop_activity)(const struct scmi_protocol_handle *ph, void *buf, si= ze_t buf_len, + u64 algo_str, u32 param_id); +}; + +#endif /* _LINUX_SCMI_QCOM_PROTOCOL_H */ --=20 2.34.1