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AJvYcCVvDwjurpuKnd8cfnbSg402jWWBR7hzPPeLyMU4VxjyU/En1K2UPANpvUxqzydC5dpnueV2c5lxLgZD@vger.kernel.org, AJvYcCX/w2u6h2KLwqCvYXBBXFiyh12Dj9BglmgbOE4/BynXRZ5h0tYzAulwGtlWJqCZuVS2VaDn812Fk95IQbk=@vger.kernel.org X-Gm-Message-State: AOJu0YwpyN0phSh6CNcsGBASs8z0OvLS7O9oPHgryybyTclHtC3Z3IIJ FQJyo/0AUU2kSamvPKBQUeAdwKnUOYbA9M5AdjJs3nKNy3igOHWr X-Google-Smtp-Source: AGHT+IFtOoTTIfseZL/AtxCGULgp8rsMErzM23/LafWsSPdU3aoQM3dDxgKn7TbBiyBWhpWUoSB38Q== X-Received: by 2002:a17:90b:4ac7:b0:2e1:cda1:12c6 with SMTP id 98e67ed59e1d1-2e1e63c58c8mr9370758a91.40.1728239119736; Sun, 06 Oct 2024 11:25:19 -0700 (PDT) Received: from localhost.localdomain ([113.30.217.221]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e1e85c905esm5458471a91.17.2024.10.06.11.25.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Oct 2024 11:25:19 -0700 (PDT) From: Anand Moon To: Shawn Lin , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , linux-pci@vger.kernel.org (open list:PCIE DRIVER FOR ROCKCHIP), linux-rockchip@lists.infradead.org (open list:PCIE DRIVER FOR ROCKCHIP), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-kernel@vger.kernel.org (open list) Cc: Anand Moon Subject: [PATCH v6 RESET 3/3] PCI: rockchip: Refactor rockchip_pcie_disable_clocks() function signature Date: Sun, 6 Oct 2024 23:54:38 +0530 Message-ID: <20241006182445.3713-4-linux.amoon@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241006182445.3713-1-linux.amoon@gmail.com> References: <20241006182445.3713-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Refactor the rockchip_pcie_disable_clocks function to accept a struct rockchip_pcie pointer instead of a void pointer. This change improves type safety and code readability by explicitly specifying the expected data type. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Anand Moon --- v6: Fix the subject, add the missing () in the function name. v5: Fix the commit message and add r-b Manivannan. v4: None v3: None v2: None --- drivers/pci/controller/pcie-rockchip.c | 3 +-- drivers/pci/controller/pcie-rockchip.h | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controlle= r/pcie-rockchip.c index 87daa3288a01..b528d561b2de 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -269,9 +269,8 @@ int rockchip_pcie_enable_clocks(struct rockchip_pcie *r= ockchip) } EXPORT_SYMBOL_GPL(rockchip_pcie_enable_clocks); =20 -void rockchip_pcie_disable_clocks(void *data) +void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip) { - struct rockchip_pcie *rockchip =3D data; =20 clk_bulk_disable_unprepare(rockchip->num_clks, rockchip->clks); } diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controlle= r/pcie-rockchip.h index 2761699f670b..7f0f938e9195 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -347,7 +347,7 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockc= hip); int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip); void rockchip_pcie_deinit_phys(struct rockchip_pcie *rockchip); int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip); -void rockchip_pcie_disable_clocks(void *data); +void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip); void rockchip_pcie_cfg_configuration_accesses( struct rockchip_pcie *rockchip, u32 type); =20 --=20 2.44.0