From nobody Thu Nov 28 03:40:05 2024 Received: from mail-yb1-f202.google.com (mail-yb1-f202.google.com [209.85.219.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0B77186E57 for ; Sat, 5 Oct 2024 19:56:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728158204; cv=none; b=dKJyTkwlkBWWVp1GuAX7+PzMOrlfQmNooTgMi1K+6a/yAueQ7CzP1+Y04uvGgED3qlA3gzNtQrKLIMHgNqIM7kpXGa+0JhGv8Htt989whhTpWx8r7ZHgpVS0COyG0BdDNkUSdMgHtD9owRt6pVPR+s384/a7BFPY6ntOkaPECe8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728158204; c=relaxed/simple; bh=SDugC5Fmr5Dawb8X5uOg5CAOpIZm6mwbqr5u9pTXYHg=; h=Date:In-Reply-To:Message-Id:Mime-Version:References:Subject:From: To:Content-Type; b=XlLDiAw3L+X2hM3YBnTkepG/jKqBO+tdZ0gPAkYv+rfS4DJb8sGFqtm5I0mvf6BlCKCDinyZImaCJizVHux5BlX7YW1kguMYHEC6J9QmF+3szfFJizQXde6Syil1PF1tREptziE3UAEd7nq7thgZgN4KBIXHkpzPqe5AQOdBzP0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=dWJDljmi; arc=none smtp.client-ip=209.85.219.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="dWJDljmi" Received: by mail-yb1-f202.google.com with SMTP id 3f1490d57ef6-e165fc5d94fso5051169276.2 for ; Sat, 05 Oct 2024 12:56:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1728158201; x=1728763001; darn=vger.kernel.org; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=6EN4TKuEmqwMJ3OScRLpO+TAx81nKWqvaFc41rGg8u8=; b=dWJDljmioHgYRyxHJglbv7vi6Fl1uoDN5b5uMhos49Ji5tpsxKIuiPEPlAW2e0V75z h4ILDsfGf75QoLOlL8zEmDOdQwX2OPqJ0tA3PbpUG3RASN/drMvKhOnySMXsHr59VgXA t+l7O7K87ht7qZEGPhdbcOHoiXjKDOPqB3c3rt18Cdm74PMuelqXQ48X1I/qr114U9h+ iPQKPzju7ZqrPafkkBnFYcSrP9hlMj/la0Hcpqp8otE/2NjdT5SMVa9gpA6EBofOibUR zAKRe2zrw7lWytkpe2O/Mwxl7kVQsKjgrAYp6mXqKr/XXs6z4HNbBfrDd66xPvv8+gON NNzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728158201; x=1728763001; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=6EN4TKuEmqwMJ3OScRLpO+TAx81nKWqvaFc41rGg8u8=; b=f83OKkq+3niTUDe93T/yA1wXy9ZmGERPio8Ppcmxnt/7CuL9NVcqqECzusQYOgsNt7 0Vl2YTS+/vs8wFlPhdgbztcq4mQTE7TD6Hnw7xGNRObkYoAuqE91d68FvQQwSsQYdUMy PPB5fANugpaQNYtOzUiaj5lPWKQsIv96Op5q8ArvgkzLBWkgP87sBde0ZWFBjY+7P0v1 8UC8bjKwwI0fQkNxAzicyZz9ADLwTKnVY0wpJJAEVZDKXMtuP9U36EidNbzLjXitM4ta yB8V6iZNWmBzwyeRtYqAesgupAnJFDOvJEzK4k01gO89GzfCvQgX9P180Xw/aPUPN7po FvVw== X-Forwarded-Encrypted: i=1; AJvYcCVZ8mjXQp3UrAKlpTTnHtD+ozStTYcqGoo65BhcS4mHMObZLgmh0YPZ6rRz0BESUVtnMnSn8MwMLoh035c=@vger.kernel.org X-Gm-Message-State: AOJu0Yw9wmlCYnj7m8PBd/tUr47lVLZ2s0bxwkh02bP7pTMC/HIl7g39 UHK9ImH/vtLJzlW0xMvNeNsl4SebK5LVBfJsrNZuZlUlOOfyePy7bm+0IlcrYOOy0/+ZsyvDXkB zvxEbjg== X-Google-Smtp-Source: AGHT+IGCNRxOO6T98fTFcdhPzhDVLhkuLPkxWJvPTvDz/vHXCXgsisg4y9asEuXLcvL8azfDw3NHB+5jV4SZ X-Received: from irogers.svl.corp.google.com ([2620:15c:2a3:200:4c2:5b4d:8797:7249]) (user=irogers job=sendgmr) by 2002:a25:2d14:0:b0:e24:9ec4:7297 with SMTP id 3f1490d57ef6-e2893950a0bmr12214276.11.1728158200702; Sat, 05 Oct 2024 12:56:40 -0700 (PDT) Date: Sat, 5 Oct 2024 12:55:29 -0700 In-Reply-To: <20241005195541.380070-1-irogers@google.com> Message-Id: <20241005195541.380070-20-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241005195541.380070-1-irogers@google.com> X-Mailer: git-send-email 2.47.0.rc0.187.ge670bccf7e-goog Subject: [PATCH v2 19/31] perf arm64: Remove dwarf-regs.c From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , John Garry , Will Deacon , James Clark , Mike Leach , Leo Yan , Guo Ren , Paul Walmsley , Palmer Dabbelt , Albert Ou , Nick Terrell , "Steven Rostedt (Google)" , "Masami Hiramatsu (Google)" , Guilherme Amadio , Changbin Du , Daniel Bristot de Oliveira , Daniel Wagner , Aditya Gupta , Athira Rajeev , Masahiro Yamada , Kajol Jain , Huacai Chen , Bibo Mao , Anup Patel , Atish Patra , Shenlin Liang , Oliver Upton , "Steinar H. Gunderson" , "Dr. David Alan Gilbert" , Chen Pei , Dima Kogan , Yury Norov , Alexander Lobakin , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-csky@vger.kernel.org, linux-riscv@lists.infradead.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The file just provides the function get_arch_regstr, however, if in the only caller get_dwarf_regstr EM_HOST is used for the EM_NONE case the function can never be called. So remove as dead code. Tidy up the EM_NONE cases for arm64 in dwarf-regs.c. Signed-off-by: Ian Rogers Acked-by: Masami Hiramatsu (Google) --- tools/perf/arch/arm64/util/Build | 1 - tools/perf/arch/arm64/util/dwarf-regs.c | 80 ------------------------- tools/perf/util/dwarf-regs.c | 4 +- tools/perf/util/include/dwarf-regs.h | 2 +- 4 files changed, 3 insertions(+), 84 deletions(-) delete mode 100644 tools/perf/arch/arm64/util/dwarf-regs.c diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/= Build index 4387a6d6a6c3..a74521b79eaa 100644 --- a/tools/perf/arch/arm64/util/Build +++ b/tools/perf/arch/arm64/util/Build @@ -4,7 +4,6 @@ perf-util-y +=3D perf_regs.o perf-util-y +=3D tsc.o perf-util-y +=3D pmu.o perf-util-$(CONFIG_LIBTRACEEVENT) +=3D kvm-stat.o -perf-util-$(CONFIG_LIBDW) +=3D dwarf-regs.o perf-util-$(CONFIG_LOCAL_LIBUNWIND) +=3D unwind-libunwind.o perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) +=3D unwind-libdw.o =20 diff --git a/tools/perf/arch/arm64/util/dwarf-regs.c b/tools/perf/arch/arm6= 4/util/dwarf-regs.c deleted file mode 100644 index 343a62fa4199..000000000000 --- a/tools/perf/arch/arm64/util/dwarf-regs.c +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Mapping of DWARF debug register numbers into register names. - * - * Copyright (C) 2010 Will Deacon, ARM Ltd. - */ - -#include -#include -#include -#include -#include - -struct regs_dwarfnum { - const char *name; - unsigned int dwarfnum; -}; - -#define REG_DWARFNUM_NAME(r, num) {.name =3D r, .dwarfnum =3D num} -#define GPR_DWARFNUM_NAME(num) \ - {.name =3D __stringify(%x##num), .dwarfnum =3D num} -#define REG_DWARFNUM_END {.name =3D NULL, .dwarfnum =3D 0} - -/* - * Reference: - * http://infocenter.arm.com/help/topic/com.arm.doc.ihi0057b/IHI0057B_aadw= arf64.pdf - */ -static const struct regs_dwarfnum regdwarfnum_table[] =3D { - GPR_DWARFNUM_NAME(0), - GPR_DWARFNUM_NAME(1), - GPR_DWARFNUM_NAME(2), - GPR_DWARFNUM_NAME(3), - GPR_DWARFNUM_NAME(4), - GPR_DWARFNUM_NAME(5), - GPR_DWARFNUM_NAME(6), - GPR_DWARFNUM_NAME(7), - GPR_DWARFNUM_NAME(8), - GPR_DWARFNUM_NAME(9), - GPR_DWARFNUM_NAME(10), - GPR_DWARFNUM_NAME(11), - GPR_DWARFNUM_NAME(12), - GPR_DWARFNUM_NAME(13), - GPR_DWARFNUM_NAME(14), - GPR_DWARFNUM_NAME(15), - GPR_DWARFNUM_NAME(16), - GPR_DWARFNUM_NAME(17), - GPR_DWARFNUM_NAME(18), - GPR_DWARFNUM_NAME(19), - GPR_DWARFNUM_NAME(20), - GPR_DWARFNUM_NAME(21), - GPR_DWARFNUM_NAME(22), - GPR_DWARFNUM_NAME(23), - GPR_DWARFNUM_NAME(24), - GPR_DWARFNUM_NAME(25), - GPR_DWARFNUM_NAME(26), - GPR_DWARFNUM_NAME(27), - GPR_DWARFNUM_NAME(28), - GPR_DWARFNUM_NAME(29), - REG_DWARFNUM_NAME("%lr", 30), - REG_DWARFNUM_NAME("%sp", 31), - REG_DWARFNUM_END, -}; - -/** - * get_arch_regstr() - lookup register name from it's DWARF register number - * @n: the DWARF register number - * - * get_arch_regstr() returns the name of the register in struct - * regdwarfnum_table from it's DWARF register number. If the register is n= ot - * found in the table, this returns NULL; - */ -const char *get_arch_regstr(unsigned int n) -{ - const struct regs_dwarfnum *roff; - - for (roff =3D regdwarfnum_table; roff->name !=3D NULL; roff++) - if (roff->dwarfnum =3D=3D n) - return roff->name; - return NULL; -} diff --git a/tools/perf/util/dwarf-regs.c b/tools/perf/util/dwarf-regs.c index eac99a246737..18e916c8e993 100644 --- a/tools/perf/util/dwarf-regs.c +++ b/tools/perf/util/dwarf-regs.c @@ -32,14 +32,14 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int flags __maybe_unused) { -#if EM_HOST =3D=3D EM_X86_64 || EM_HOST =3D=3D EM_386 +#if EM_HOST =3D=3D EM_X86_64 || EM_HOST =3D=3D EM_386 || EM_HOST =3D=3D EM= _AARCH64 if (machine =3D=3D EM_NONE) { /* Generic arch - use host arch */ machine =3D EM_HOST; } #endif switch (machine) { -#if EM_HOST !=3D EM_X86_64 && EM_HOST !=3D EM_386 +#if EM_HOST !=3D EM_X86_64 && EM_HOST !=3D EM_386 && EM_HOST !=3D EM_AARCH= 64 case EM_NONE: /* Generic arch - use host arch */ return get_arch_regstr(n); #endif diff --git a/tools/perf/util/include/dwarf-regs.h b/tools/perf/util/include= /dwarf-regs.h index 062623aefd5a..e640657f69c8 100644 --- a/tools/perf/util/include/dwarf-regs.h +++ b/tools/perf/util/include/dwarf-regs.h @@ -79,7 +79,7 @@ #define DWARF_REG_FB 0xd3affb /* random number */ =20 #ifdef HAVE_LIBDW_SUPPORT -#if !defined(__x86_64__) && !defined(__i386__) +#if !defined(__x86_64__) && !defined(__i386__) && !defined(__aarch64__) const char *get_arch_regstr(unsigned int n); #endif =20 --=20 2.47.0.rc0.187.ge670bccf7e-goog