From nobody Thu Nov 28 03:32:50 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 64E341547FF for ; Sat, 5 Oct 2024 12:38:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131925; cv=none; b=G798jhrbM5IGRaY4oPGxToSH18CfTRo/2ftSFD+N9RZa7EebBCisxfP0MQ+s9vuDOHYG8bLxNVSB+dUQqIxp734kNYjD+mXw3l65a1AS3OgBb/7d2j9CJ6OEdrUIpTQNSbiW26hrbwEYROW5ZVsxLiq2hXk4jUNQD4TDL50Rlps= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131925; c=relaxed/simple; bh=feAzXXC1edxnHlLjdNG5JUQhZRVL7SQv8APzcDLiaAc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BxiEwcjSC/T1t1sOqmT1q7gCJ661+YraZwZNnliKUsVgEqMTYp9OJeRcCoyeYPcxeCqnh78kzfVs/CT+3Bx/Te92YEMOCSPnF7O4vBJqG66E8bzPpq7VRaC+UekHaHhLadZW997mn3IP5edgsUadRrNT0PEj0+h9PB0X/olNJHk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9B5071007; Sat, 5 Oct 2024 05:39:12 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.39.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 444DB3F64C; Sat, 5 Oct 2024 05:38:39 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Marc Zyngier , Oliver Upton , James Morse , Catalin Marinas , Will Deacon , Ard Biesheuvel , Ryan Roberts , Mark Rutland , kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] arm64/ptdump: Test PMD_TYPE_MASK for block mapping Date: Sat, 5 Oct 2024 18:08:22 +0530 Message-Id: <20241005123824.1366397-4-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241005123824.1366397-1-anshuman.khandual@arm.com> References: <20241005123824.1366397-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" arm64 block mapping requires given page table entry's bits[1:0] to be "01". But now only bit[1] is checked to be clear, while also implicitly assuming bit[0] to be set. This modifies ptdump to check both the relevant bits via the mask PMD_TYPE_MASK and check the resultant value against PMD_TYPE_MASK. Cc: Catalin Marinas Cc: Will Deacon Cc: Ard Biesheuvel Cc: Ryan Roberts Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Ryan Roberts --- arch/arm64/mm/ptdump.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c index 264c5f9b97d8..8cec0da4cff2 100644 --- a/arch/arm64/mm/ptdump.c +++ b/arch/arm64/mm/ptdump.c @@ -80,10 +80,10 @@ static const struct ptdump_prot_bits pte_bits[] =3D { .set =3D "CON", .clear =3D " ", }, { - .mask =3D PTE_TABLE_BIT, - .val =3D PTE_TABLE_BIT, - .set =3D " ", - .clear =3D "BLK", + .mask =3D PMD_TYPE_MASK, + .val =3D PMD_TYPE_SECT, + .set =3D "BLK", + .clear =3D " ", }, { .mask =3D PTE_UXN, .val =3D PTE_UXN, --=20 2.25.1