From nobody Thu Nov 28 01:36:06 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 624BD14F9FF for ; Sat, 5 Oct 2024 12:38:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131921; cv=none; b=qUGIBmTrInoByM+LQbSIujzIbnFmZFGdtQH/hKffAo1IF3yUD6KUzjms51/GmxzpMYnjLpN1AyZuwXfYsWNXlCB3y5q0+IOHcg6tuz1EM9zVb1J4vIKVPHVLELx14I5s/XiR22Uc+v6cpvf2APT82QsqSWcCwM8fwsgEM1tP8qI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131921; c=relaxed/simple; bh=JqamoxHm7kNW47ehaGwMfVwVIDgzkqNYDKZYgxUyvj4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=exhbXlh3rv3DxKqU8J3l2mYYjf1h4dYx/IATMbT2xhcNp4dp86wFR6wWt2i6OyP7OGHLYlUjB0Efr1HHOAcXk75xIqtgrE1nwLNXnjiH3/drk+O+AXxAaGUg/LS9GUtafcoK+I75rCqWb1WIe8C5WEEDMiJDfR+TdqtkA6ZHM9I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D8D0D1063; Sat, 5 Oct 2024 05:39:03 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.39.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8BC6B3F64C; Sat, 5 Oct 2024 05:38:30 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Marc Zyngier , Oliver Upton , James Morse , Catalin Marinas , Will Deacon , Ard Biesheuvel , Ryan Roberts , Mark Rutland , kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] arm64/mm: Drop pte_mkhuge() Date: Sat, 5 Oct 2024 18:08:20 +0530 Message-Id: <20241005123824.1366397-2-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241005123824.1366397-1-anshuman.khandual@arm.com> References: <20241005123824.1366397-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Core HugeTLB defines arch_make_huge_pte() fallback definition, which calls platform provided pte_mkhuge(). But if any platform already provides custom arch_make_huge_pte(), then it does not need to provide pte_mkhuge(). arm64 defines arch_make_huge_pte(), but then also calls pte_mkhuge() internally. This creates confusion as if both of these callbacks are being used in core HugeTLB and required to be defined in the platform. This changes arch_make_huge_pte() to create block mapping directly and also drops off now redundant helper pte_mkhuge(), making things clear. Also this changes HugeTLB page creation from just clearing the PTE_TABLE_BIT (bit[1]) to actually setting bits[1:0] via PTE_TYPE_[MASK|SECT] instead. Cc: Catalin Marinas Cc: Will Deacon Cc: Ard Biesheuvel Cc: Ryan Roberts Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/pgtable-hwdef.h | 1 + arch/arm64/include/asm/pgtable.h | 5 ----- arch/arm64/mm/hugetlbpage.c | 2 +- 3 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/as= m/pgtable-hwdef.h index fd330c1db289..956a702cb532 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -158,6 +158,7 @@ #define PTE_VALID (_AT(pteval_t, 1) << 0) #define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) #define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0) +#define PTE_TYPE_SECT (_AT(pteval_t, 1) << 0) #define PTE_TABLE_BIT (_AT(pteval_t, 1) << 1) #define PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */ #define PTE_RDONLY (_AT(pteval_t, 1) << 7) /* AP[2] */ diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index c329ea061dc9..fa4c32a9f572 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -438,11 +438,6 @@ static inline void __set_ptes(struct mm_struct *mm, } } =20 -/* - * Huge pte definitions. - */ -#define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT)) - /* * Hugetlb definitions. */ diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index 5f1e2103888b..5922c95630ad 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -361,7 +361,7 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shif= t, vm_flags_t flags) { size_t pagesize =3D 1UL << shift; =20 - entry =3D pte_mkhuge(entry); + entry =3D __pte((pte_val(entry) & ~PTE_TYPE_MASK) | PTE_TYPE_SECT); if (pagesize =3D=3D CONT_PTE_SIZE) { entry =3D pte_mkcont(entry); } else if (pagesize =3D=3D CONT_PMD_SIZE) { --=20 2.25.1 From nobody Thu Nov 28 01:36:06 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5AD2314AD19 for ; Sat, 5 Oct 2024 12:38:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131921; cv=none; b=TN3PFtIfum/nyP/TYKGX61WNCRXITgTyVUeK+TfelGLm256ZgEf89EbhxUvhE+7R/zYyn3KgXYgWrVlcMmsDQhdDnIblIcguDd2Q4mBTzLnb3p+tgIVyNQRRFhZLl/Gko7w/sokCo++4L4GAiWilIuU/aFuBZtGk5OddNZ0OSJ8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131921; c=relaxed/simple; bh=7zrasJNwnYsyr+LOvEEOwy/SzZXk+OU/QkFhgFojQsQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dxuwYBGaBM/XtxqTbao1lSvFeWdr1tDgjnkTHefWJyDN/Pq21ngAR91QRdQQmm1bOg8PWfrclCuGOBMbg6t6iV90cIw+uMftC+iXUbV7mtP0AqZallz42kGZz7zPO2LCYhOCYM60s5FBV+aOE+a2gVJKMsR4NoxzGSr+BzJXNTI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3F37C106F; Sat, 5 Oct 2024 05:39:08 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.39.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DE9D83F64C; Sat, 5 Oct 2024 05:38:34 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Marc Zyngier , Oliver Upton , James Morse , Catalin Marinas , Will Deacon , Ard Biesheuvel , Ryan Roberts , Mark Rutland , kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] arm64/mm: Replace PXD_TABLE_BIT with PXD_TYPE_[MASK|SECT] Date: Sat, 5 Oct 2024 18:08:21 +0530 Message-Id: <20241005123824.1366397-3-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241005123824.1366397-1-anshuman.khandual@arm.com> References: <20241005123824.1366397-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This modifies existing block mapping related helpers e.g [pmd|pud]_mkhuge() , mk_[pmd|pud]_sect_prot() and pmd_trans_huge() to use PXD_TYPE_[MASK|SECT] instead of corresponding PXD_TABLE_BIT. This also moves pmd_sect() earlier for the symbol's availability preventing a build warning. While here this also drops pmd_val() check from pmd_trans_huge() helper, as pmd_present() returning true already ensures that pmd_val() cannot be false Cc: Catalin Marinas Cc: Will Deacon Cc: Ard Biesheuvel Cc: Ryan Roberts Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/pgtable.h | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index fa4c32a9f572..45c49c5ace80 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -484,12 +484,12 @@ static inline pmd_t pte_pmd(pte_t pte) =20 static inline pgprot_t mk_pud_sect_prot(pgprot_t prot) { - return __pgprot((pgprot_val(prot) & ~PUD_TABLE_BIT) | PUD_TYPE_SECT); + return __pgprot((pgprot_val(prot) & ~PUD_TYPE_MASK) | PUD_TYPE_SECT); } =20 static inline pgprot_t mk_pmd_sect_prot(pgprot_t prot) { - return __pgprot((pgprot_val(prot) & ~PMD_TABLE_BIT) | PMD_TYPE_SECT); + return __pgprot((pgprot_val(prot) & ~PMD_TYPE_MASK) | PMD_TYPE_SECT); } =20 static inline pte_t pte_swp_mkexclusive(pte_t pte) @@ -554,10 +554,13 @@ static inline int pmd_protnone(pmd_t pmd) * THP definitions. */ =20 +#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) =3D=3D \ + PMD_TYPE_SECT) + #ifdef CONFIG_TRANSPARENT_HUGEPAGE static inline int pmd_trans_huge(pmd_t pmd) { - return pmd_val(pmd) && pmd_present(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT= ); + return pmd_present(pmd) && pmd_sect(pmd); } #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ =20 @@ -586,7 +589,7 @@ static inline int pmd_trans_huge(pmd_t pmd) =20 #define pmd_write(pmd) pte_write(pmd_pte(pmd)) =20 -#define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT)) +#define pmd_mkhuge(pmd) (__pmd((pmd_val(pmd) & ~PMD_TYPE_MASK) | PMD_TYPE= _SECT)) =20 #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define pmd_devmap(pmd) pte_devmap(pmd_pte(pmd)) @@ -614,7 +617,7 @@ static inline pmd_t pmd_mkspecial(pmd_t pmd) #define pud_mkyoung(pud) pte_pud(pte_mkyoung(pud_pte(pud))) #define pud_write(pud) pte_write(pud_pte(pud)) =20 -#define pud_mkhuge(pud) (__pud(pud_val(pud) & ~PUD_TABLE_BIT)) +#define pud_mkhuge(pud) (__pud((pud_val(pud) & ~PUD_TYPE_MASK) | PUD_TYPE= _SECT)) =20 #define __pud_to_phys(pud) __pte_to_phys(pud_pte(pud)) #define __phys_to_pud_val(phys) __phys_to_pte_val(phys) @@ -712,8 +715,6 @@ extern pgprot_t phys_mem_access_prot(struct file *file,= unsigned long pfn, =20 #define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) =3D=3D \ PMD_TYPE_TABLE) -#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) =3D=3D \ - PMD_TYPE_SECT) #define pmd_leaf(pmd) (pmd_present(pmd) && !pmd_table(pmd)) #define pmd_bad(pmd) (!pmd_table(pmd)) =20 --=20 2.25.1 From nobody Thu Nov 28 01:36:06 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 64E341547FF for ; Sat, 5 Oct 2024 12:38:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131925; cv=none; b=G798jhrbM5IGRaY4oPGxToSH18CfTRo/2ftSFD+N9RZa7EebBCisxfP0MQ+s9vuDOHYG8bLxNVSB+dUQqIxp734kNYjD+mXw3l65a1AS3OgBb/7d2j9CJ6OEdrUIpTQNSbiW26hrbwEYROW5ZVsxLiq2hXk4jUNQD4TDL50Rlps= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131925; c=relaxed/simple; bh=feAzXXC1edxnHlLjdNG5JUQhZRVL7SQv8APzcDLiaAc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BxiEwcjSC/T1t1sOqmT1q7gCJ661+YraZwZNnliKUsVgEqMTYp9OJeRcCoyeYPcxeCqnh78kzfVs/CT+3Bx/Te92YEMOCSPnF7O4vBJqG66E8bzPpq7VRaC+UekHaHhLadZW997mn3IP5edgsUadRrNT0PEj0+h9PB0X/olNJHk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9B5071007; Sat, 5 Oct 2024 05:39:12 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.39.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 444DB3F64C; Sat, 5 Oct 2024 05:38:39 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Marc Zyngier , Oliver Upton , James Morse , Catalin Marinas , Will Deacon , Ard Biesheuvel , Ryan Roberts , Mark Rutland , kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] arm64/ptdump: Test PMD_TYPE_MASK for block mapping Date: Sat, 5 Oct 2024 18:08:22 +0530 Message-Id: <20241005123824.1366397-4-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241005123824.1366397-1-anshuman.khandual@arm.com> References: <20241005123824.1366397-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" arm64 block mapping requires given page table entry's bits[1:0] to be "01". But now only bit[1] is checked to be clear, while also implicitly assuming bit[0] to be set. This modifies ptdump to check both the relevant bits via the mask PMD_TYPE_MASK and check the resultant value against PMD_TYPE_MASK. Cc: Catalin Marinas Cc: Will Deacon Cc: Ard Biesheuvel Cc: Ryan Roberts Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Ryan Roberts --- arch/arm64/mm/ptdump.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c index 264c5f9b97d8..8cec0da4cff2 100644 --- a/arch/arm64/mm/ptdump.c +++ b/arch/arm64/mm/ptdump.c @@ -80,10 +80,10 @@ static const struct ptdump_prot_bits pte_bits[] =3D { .set =3D "CON", .clear =3D " ", }, { - .mask =3D PTE_TABLE_BIT, - .val =3D PTE_TABLE_BIT, - .set =3D " ", - .clear =3D "BLK", + .mask =3D PMD_TYPE_MASK, + .val =3D PMD_TYPE_SECT, + .set =3D "BLK", + .clear =3D " ", }, { .mask =3D PTE_UXN, .val =3D PTE_UXN, --=20 2.25.1 From nobody Thu Nov 28 01:36:06 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C9B2C14C5BF for ; Sat, 5 Oct 2024 12:38:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131929; cv=none; b=N5XELB9e/boXg9ke4tB+apPGfwol5l1VEACBM8ptAIwZaXeptY4wbF3R+uswEP87mJOxUl8pvLWpTE2wDaoeTRy5d/UL7MD4DPKn27L9zAaSMC91AEM+lUIRf7OFDdjg6FtVuEDQJ4Y5xy7AzHIlkWRIkssk/mmXc8eurmz1kLw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131929; c=relaxed/simple; bh=Z7kazaIF5WNMGOyAEoMizSXGQAqW9WcgsTT4OhzJgjA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=q4u5g35TQBbIx21P3gPdZqmMryUjvk5Rdndh0bSqFhM4GdHv/8ptPq30o0EfvbaapJnLFvli0XSPR/za8FAaDw5AjE4sexFZRUv6NSBG4CEq6N5sC8JIpO+XnjVB1BmkrylGOipq6dO3p3UKLEsKj4KxERrww40+DooMeLa3gt0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 074A11063; Sat, 5 Oct 2024 05:39:17 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.39.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A24133F64C; Sat, 5 Oct 2024 05:38:43 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Marc Zyngier , Oliver Upton , James Morse , Catalin Marinas , Will Deacon , Ard Biesheuvel , Ryan Roberts , Mark Rutland , kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] KVM: arm64: ptdump: Test PMD_TYPE_MASK for block mapping Date: Sat, 5 Oct 2024 18:08:23 +0530 Message-Id: <20241005123824.1366397-5-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241005123824.1366397-1-anshuman.khandual@arm.com> References: <20241005123824.1366397-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This changes stage-2 ptdump making it test given page table entries against PMD_TYPE_SECT on PMD_TYPE_MASK bits for a block mapping, as is the case for stage-1 ptdump. Cc: Marc Zyngier Cc: Oliver Upton Cc: James Morse Cc: Catalin Marinas Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.linux.dev Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Ryan Roberts --- arch/arm64/kvm/ptdump.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/ptdump.c b/arch/arm64/kvm/ptdump.c index e4a342e903e2..098416d7e5c2 100644 --- a/arch/arm64/kvm/ptdump.c +++ b/arch/arm64/kvm/ptdump.c @@ -52,8 +52,8 @@ static const struct ptdump_prot_bits stage2_pte_bits[] = =3D { .set =3D "AF", .clear =3D " ", }, { - .mask =3D PTE_TABLE_BIT | PTE_VALID, - .val =3D PTE_VALID, + .mask =3D PMD_TYPE_MASK, + .val =3D PMD_TYPE_SECT, .set =3D "BLK", .clear =3D " ", }, --=20 2.25.1 From nobody Thu Nov 28 01:36:06 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5610A14F9FB for ; Sat, 5 Oct 2024 12:38:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131933; cv=none; b=BOq6feQ/BCGDsyTDg0LyWri9Vov/CSWlW8mhXhv6RAQkcOyY49OGhfsA/DamJJgAGLL8o3bh7MyMFDXOec2wUqXeNOQA+bsdnA23X/94dlJrpzS6IdYcvLgeYQc/2f8SKJw1apmjINPeAs68sbLt6EIAOwxx/hyD1LgZZYGbycY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728131933; c=relaxed/simple; bh=P4renK8VRo+8S283PlYDtwyBxs58Pg1nLMEqFY3M+b0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DWldk2HKucqr4BCERPGMZNMKSBVLfeevzo3tfTGht3R/GfIp3ThAewbIzREAA9njO4I5Aj1AI/5Z6y2+k3vbkg06FFmEztEGRgl9OuThvu4W26RAl8VbSuZ4LzHYYTCQIThnGI5MjeCto7oWPBKN2/ud0ZSvFJtP/OwGmxeYoHs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5845D1063; Sat, 5 Oct 2024 05:39:21 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.39.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0BCF33F64C; Sat, 5 Oct 2024 05:38:47 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Marc Zyngier , Oliver Upton , James Morse , Catalin Marinas , Will Deacon , Ard Biesheuvel , Ryan Roberts , Mark Rutland , kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] arm64/mm: Drop PXD_TABLE_BIT Date: Sat, 5 Oct 2024 18:08:24 +0530 Message-Id: <20241005123824.1366397-6-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241005123824.1366397-1-anshuman.khandual@arm.com> References: <20241005123824.1366397-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This just drops table bit position markers for all page table levels, which are not used any more. Cc: Catalin Marinas Cc: Will Deacon Cc: Ard Biesheuvel Cc: Ryan Roberts Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/pgtable-hwdef.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/as= m/pgtable-hwdef.h index 956a702cb532..a524a8bb570f 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -97,7 +97,6 @@ * Level -1 descriptor (PGD). */ #define PGD_TYPE_TABLE (_AT(pgdval_t, 3) << 0) -#define PGD_TABLE_BIT (_AT(pgdval_t, 1) << 1) #define PGD_TYPE_MASK (_AT(pgdval_t, 3) << 0) #define PGD_TABLE_PXN (_AT(pgdval_t, 1) << 59) #define PGD_TABLE_UXN (_AT(pgdval_t, 1) << 60) @@ -106,7 +105,6 @@ * Level 0 descriptor (P4D). */ #define P4D_TYPE_TABLE (_AT(p4dval_t, 3) << 0) -#define P4D_TABLE_BIT (_AT(p4dval_t, 1) << 1) #define P4D_TYPE_MASK (_AT(p4dval_t, 3) << 0) #define P4D_TYPE_SECT (_AT(p4dval_t, 1) << 0) #define P4D_SECT_RDONLY (_AT(p4dval_t, 1) << 7) /* AP[2] */ @@ -117,7 +115,6 @@ * Level 1 descriptor (PUD). */ #define PUD_TYPE_TABLE (_AT(pudval_t, 3) << 0) -#define PUD_TABLE_BIT (_AT(pudval_t, 1) << 1) #define PUD_TYPE_MASK (_AT(pudval_t, 3) << 0) #define PUD_TYPE_SECT (_AT(pudval_t, 1) << 0) #define PUD_SECT_RDONLY (_AT(pudval_t, 1) << 7) /* AP[2] */ @@ -130,7 +127,6 @@ #define PMD_TYPE_MASK (_AT(pmdval_t, 3) << 0) #define PMD_TYPE_TABLE (_AT(pmdval_t, 3) << 0) #define PMD_TYPE_SECT (_AT(pmdval_t, 1) << 0) -#define PMD_TABLE_BIT (_AT(pmdval_t, 1) << 1) =20 /* * Section @@ -159,7 +155,6 @@ #define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) #define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0) #define PTE_TYPE_SECT (_AT(pteval_t, 1) << 0) -#define PTE_TABLE_BIT (_AT(pteval_t, 1) << 1) #define PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */ #define PTE_RDONLY (_AT(pteval_t, 1) << 7) /* AP[2] */ #define PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ --=20 2.25.1