From nobody Thu Nov 28 04:51:01 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9DAE51DD89E; Fri, 4 Oct 2024 15:30:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728055851; cv=none; b=P8CSpMVbsr/yr1jYjOvPJUvu3J8er6R6rrhH3tjB9fWePv72Dq9Le0lA6U+tISPhixOjzZILYEW+9+S6IAjcHAkParQvPvpJPR/BzG3M+FTxb+wx7mlZ9l2xYppk9KOAwcwKXVDqHviLgv+cVlYkfHjk5OOkcffAZWoX01PnxvM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728055851; c=relaxed/simple; bh=sRKKQiLb/P9DYc3eyyLqHoS5WiUy+cvkQw0HCQX/4xE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=c8z9d8ZOxk/V3TeG8pYOPYOJHeX7b72zpMWe6UgjslfoecOmW7szwLmi1iNq0QI8C5+39kSAW3daxs6Qc3Z7CQgpk3uAf3zewjBOsTAXkrUIpmkf0KCGCnidtZzKH01Kc21g7DBKlQzDVETygc0tiA/+6SD42I3sUQOl76LsFoo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8128A1063; Fri, 4 Oct 2024 08:31:18 -0700 (PDT) Received: from e122027.cambridge.arm.com (unknown [10.1.25.25]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5E4663F640; Fri, 4 Oct 2024 08:30:44 -0700 (PDT) From: Steven Price To: kvm@vger.kernel.org, kvmarm@lists.linux.dev Cc: Steven Price , Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Suzuki K Poulose , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni , Gavin Shan , Shanker Donthineni , Alper Gun , "Aneesh Kumar K . V" Subject: [PATCH v5 33/43] arm64: rme: Enable PMU support with a realm guest Date: Fri, 4 Oct 2024 16:27:54 +0100 Message-Id: <20241004152804.72508-34-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241004152804.72508-1-steven.price@arm.com> References: <20241004152804.72508-1-steven.price@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the PMU registers from the RmiRecExit structure to identify when an overflow interrupt is due and inject it into the guest. Also hook up the configuration option for enabling the PMU within the guest. When entering a realm guest with a PMU interrupt pending, it is necessary to disable the physical interrupt. Otherwise when the RMM restores the PMU state the physical interrupt will trigger causing an immediate exit back to the host. The guest is expected to acknowledge the interrupt causing a host exit (to update the GIC state) which gives the opportunity to re-enable the physical interrupt before the next PMU event. Number of PMU counters is configured by the VMM by writing to PMCR.N. Signed-off-by: Steven Price --- Changes since v2: * Add a macro kvm_pmu_get_irq_level() to avoid compile issues when PMU support is disabled. --- arch/arm64/kvm/arm.c | 11 +++++++++++ arch/arm64/kvm/guest.c | 7 +++++++ arch/arm64/kvm/pmu-emul.c | 4 +++- arch/arm64/kvm/rme.c | 8 ++++++++ arch/arm64/kvm/sys_regs.c | 2 +- include/kvm/arm_pmu.h | 4 ++++ 6 files changed, 34 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 78368c357bfc..01128413088a 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1223,6 +1224,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) run->exit_reason =3D KVM_EXIT_UNKNOWN; run->flags =3D 0; while (ret > 0) { + bool pmu_stopped =3D false; + /* * Check conditions before entering the guest */ @@ -1254,6 +1257,11 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) =20 kvm_pmu_flush_hwstate(vcpu); =20 + if (vcpu_is_rec(vcpu) && kvm_pmu_get_irq_level(vcpu)) { + pmu_stopped =3D true; + arm_pmu_set_phys_irq(false); + } + local_irq_disable(); =20 kvm_vgic_flush_hwstate(vcpu); @@ -1356,6 +1364,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) =20 preempt_enable(); =20 + if (pmu_stopped) + arm_pmu_set_phys_irq(true); + /* * The ARMv8 architecture doesn't give the hypervisor * a mechanism to prevent a guest from dropping to AArch32 EL0 diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 9dadd923848b..1833dec36cd2 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -783,6 +783,8 @@ int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct= kvm_one_reg *reg) return kvm_arm_sys_reg_get_reg(vcpu, reg); } =20 +#define KVM_REG_ARM_PMCR_EL0 ARM64_SYS_REG(3, 3, 9, 12, 0) + /* * The RMI ABI only enables setting the lower GPRs (x0-x7) and PC. * All other registers are reset to architectural or otherwise defined res= et @@ -801,6 +803,11 @@ static bool validate_realm_set_reg(struct kvm_vcpu *vc= pu, case KVM_REG_ARM_CORE_REG(regs.pc): return true; } + } else { + switch (reg->id) { + case KVM_REG_ARM_PMCR_EL0: + return true; + } } =20 return false; diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c index ac36c438b8c1..7bdf6169812b 100644 --- a/arch/arm64/kvm/pmu-emul.c +++ b/arch/arm64/kvm/pmu-emul.c @@ -340,7 +340,9 @@ static u64 kvm_pmu_overflow_status(struct kvm_vcpu *vcp= u) { u64 reg =3D 0; =20 - if ((kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E)) { + if (vcpu_is_rec(vcpu)) { + reg =3D vcpu->arch.rec.run->exit.pmu_ovf_status; + } else if ((kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E)) { reg =3D __vcpu_sys_reg(vcpu, PMOVSSET_EL0); reg &=3D __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); reg &=3D __vcpu_sys_reg(vcpu, PMINTENSET_EL1); diff --git a/arch/arm64/kvm/rme.c b/arch/arm64/kvm/rme.c index 965c99d1f6e8..9a4d0299e56a 100644 --- a/arch/arm64/kvm/rme.c +++ b/arch/arm64/kvm/rme.c @@ -325,6 +325,11 @@ static int realm_create_rd(struct kvm *kvm) params->rtt_base =3D kvm->arch.mmu.pgd_phys; params->vmid =3D realm->vmid; =20 + if (kvm->arch.arm_pmu) { + params->pmu_num_ctrs =3D kvm->arch.pmcr_n; + params->flags |=3D RMI_REALM_PARAM_FLAG_PMU; + } + params_phys =3D virt_to_phys(params); =20 if (rmi_realm_create(rd_phys, params_phys)) { @@ -1406,6 +1411,9 @@ int kvm_create_rec(struct kvm_vcpu *vcpu) if (!vcpu_has_feature(vcpu, KVM_ARM_VCPU_PSCI_0_2)) return -EINVAL; =20 + if (vcpu->kvm->arch.arm_pmu && !kvm_vcpu_has_pmu(vcpu)) + return -EINVAL; + BUILD_BUG_ON(sizeof(*params) > PAGE_SIZE); BUILD_BUG_ON(sizeof(*rec->run) > PAGE_SIZE); =20 diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index dad88e31f953..10949f3318ed 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1284,7 +1284,7 @@ static int set_pmcr(struct kvm_vcpu *vcpu, const stru= ct sys_reg_desc *r, * implements. Ignore this error to maintain compatibility * with the existing KVM behavior. */ - if (!kvm_vm_has_ran_once(kvm) && + if (!kvm_vm_has_ran_once(kvm) && !kvm_realm_is_created(kvm) && new_n <=3D kvm_arm_pmu_get_max_counters(kvm)) kvm->arch.pmcr_n =3D new_n; =20 diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h index e08aeec5d936..d301978a0406 100644 --- a/include/kvm/arm_pmu.h +++ b/include/kvm/arm_pmu.h @@ -76,6 +76,8 @@ void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu); void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu); void kvm_vcpu_pmu_resync_el0(void); =20 +#define kvm_pmu_get_irq_level(vcpu) ((vcpu)->arch.pmu.irq_level) + #define kvm_vcpu_has_pmu(vcpu) \ (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PMU_V3)) =20 @@ -157,6 +159,8 @@ static inline u64 kvm_pmu_get_pmceid(struct kvm_vcpu *v= cpu, bool pmceid1) return 0; } =20 +#define kvm_pmu_get_irq_level(vcpu) (false) + #define kvm_vcpu_has_pmu(vcpu) ({ false; }) static inline void kvm_pmu_update_vcpu_events(struct kvm_vcpu *vcpu) {} static inline void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) {} --=20 2.34.1