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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCH 1/5] ARM: dts: qcom: ipq4019: use nvmem-layout Date: Thu, 3 Oct 2024 14:57:42 -0700 Message-ID: <20241003215746.275349-2-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241003215746.275349-1-rosenp@gmail.com> References: <20241003215746.275349-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/= boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi index 0d23c03fae33..a6d4390efa7c 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi @@ -166,16 +166,19 @@ partition@170000 { label =3D "ART"; reg =3D <0x00170000 0x00010000>; read-only; - compatible =3D "nvmem-cells"; - #address-cells =3D <1>; - #size-cells =3D <1>; =20 - precal_art_1000: precal@1000 { - reg =3D <0x1000 0x2f20>; - }; + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + precal_art_1000: precal@1000 { + reg =3D <0x1000 0x2f20>; + }; =20 - precal_art_5000: precal@5000 { - reg =3D <0x5000 0x2f20>; + precal_art_5000: precal@5000 { + reg =3D <0x5000 0x2f20>; + }; }; }; =20 --=20 2.46.2 From nobody Thu Nov 28 05:47:03 2024 Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B24F1CC168; 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Thu, 03 Oct 2024 14:57:56 -0700 (PDT) Received: from ryzen.lan ([2601:644:8200:dab8::a86]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71dd9d6e67esm1863026b3a.39.2024.10.03.14.57.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2024 14:57:56 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCH 2/5] arm64: dts: bcm4908: nvmem-layout conversion Date: Thu, 3 Oct 2024 14:57:43 -0700 Message-ID: <20241003215746.275349-3-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241003215746.275349-1-rosenp@gmail.com> References: <20241003215746.275349-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts= b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts index 999d93730240..df47fc75fa3a 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts @@ -144,16 +144,18 @@ partitions { #size-cells =3D <1>; =20 partition@0 { - compatible =3D "nvmem-cells"; label =3D "cferom"; reg =3D <0x0 0x100000>; - - #address-cells =3D <1>; - #size-cells =3D <1>; ranges =3D <0 0x0 0x100000>; =20 - base_mac_addr: mac@106a0 { - reg =3D <0x106a0 0x6>; + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + base_mac_addr: mac@106a0 { + reg =3D <0x106a0 0x6>; + }; }; }; =20 --=20 2.46.2 From nobody Thu Nov 28 05:47:03 2024 Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 604F11CDA08; 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Thu, 03 Oct 2024 14:57:59 -0700 (PDT) Received: from ryzen.lan ([2601:644:8200:dab8::a86]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71dd9d6e67esm1863026b3a.39.2024.10.03.14.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2024 14:57:59 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCH 3/5] arm64: dts: armada-3720-gl-mv1000: use nvmem-layout Date: Thu, 3 Oct 2024 14:57:44 -0700 Message-ID: <20241003215746.275349-4-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241003215746.275349-1-rosenp@gmail.com> References: <20241003215746.275349-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../dts/marvell/armada-3720-gl-mv1000.dts | 30 +++++++++---------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/a= rm64/boot/dts/marvell/armada-3720-gl-mv1000.dts index 56930f2ce481..7b801b60862d 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -98,10 +98,24 @@ partition@f0000 { reg =3D <0xf0000 0x8000>; }; =20 - factory: partition@f8000 { + partition@f8000 { label =3D "factory"; reg =3D <0xf8000 0x8000>; read-only; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + macaddr_factory_0: macaddr@0 { + reg =3D <0x0 0x6>; + }; + + macaddr_factory_6: macaddr@6 { + reg =3D <0x6 0x6>; + }; + }; }; =20 partition@100000 { @@ -221,17 +235,3 @@ fixed-link { full-duplex; }; }; - -&factory { - compatible =3D "nvmem-cells"; - #address-cells =3D <1>; - #size-cells =3D <1>; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCH 4/5] arm64: dts: mediatek: 7886cax: use nvmem-layout Date: Thu, 3 Oct 2024 14:57:45 -0700 Message-ID: <20241003215746.275349-5-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241003215746.275349-1-rosenp@gmail.com> References: <20241003215746.275349-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts b/= arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts index 08b3b0827436..9a6625d8660f 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts @@ -121,7 +121,6 @@ partition@100000 { }; =20 partition@180000 { - compatible =3D "nvmem-cells"; reg =3D <0x180000 0x200000>; label =3D "factory"; read-only; --=20 2.46.2 From nobody Thu Nov 28 05:47:03 2024 Received: from mail-pg1-f171.google.com (mail-pg1-f171.google.com [209.85.215.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 822B01CFEB4; Thu, 3 Oct 2024 21:58:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727992686; cv=none; b=sqwMhB+UBoTCYh4SDtEUP8vc1gDBeSb22IAxGRWSTb4apeBolFit7sz3d9MPZcldyImWTEyrlG2GfzGZDfQ3bog80CWDPzEObNWsUBjaoB68GztvI7Uno3vkUW2P4QZPBLLqcM6R1/8d2HGZKtEkuMq6Q/m4nmxc4BvbZ/fLO2M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727992686; c=relaxed/simple; bh=AITe+joTDTE1ceSIiMueoTWM94jovWJaA1azP+bj0KE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RvdMnbjnuFpzHizJof7bNtO+GsugB8eQytTSKQxfpqM1oogIOz/GtEPQ0vOGs3bJIY62z+Y9oVqoBEjYrRTX+dY/UkJNknB4l3IVvnINrCMW7FNDdCVIzSXu/UyAFD7wbefKHQf3llnMof2swR5S7rpaCxzYs2oFuM/tjXqVsmU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=dCGxbuNG; arc=none smtp.client-ip=209.85.215.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="dCGxbuNG" Received: by mail-pg1-f171.google.com with SMTP id 41be03b00d2f7-6e7b121be30so942598a12.1; Thu, 03 Oct 2024 14:58:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1727992685; x=1728597485; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BoWKDt0SpQuuIThiGyg8a6unwje1fIaaXWcdpLVdhAs=; b=dCGxbuNG+KtnxZ41BD7ijOPNbfNqNT3+tItt7PCCvUfdBsAXAHNW191iwoUCFp0c82 trW96s5biPihv4t8PUH8MEiBVs1aAHqSqU+fDiTmIfRNSctbhX9PgiYXRsjsGfySiQ2D wlFIHvvUT6OM1/437R4KPDQBFoExT7M2akNDIE1gCSGUP6CTqo4n8AFTkbt+Rw1jMGAX BGTsBSwHIp/rlDeyX6kBc4qP0s1XEqiLf8hf34cAk7DC/FPmOQUdf57jc2T4lwi1LRY7 rqrWyie1RFX+Np7RSUdArI9xxRktbpTbN68bdyl5rfZVcj3h+D0w5rNkYysJolYeO7ga 7HmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727992685; x=1728597485; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BoWKDt0SpQuuIThiGyg8a6unwje1fIaaXWcdpLVdhAs=; b=STyiuEsqAOW3DQD1XXoDJBbb+SczPfsAj2bD8GE592E8jr1traH5q4yvaz+De0KbXV JSS24tpDezYBz8AUoDprXOXkdZDJV8R8Q8NzAfIqH2TLEuXoijUNlNsrXKlJnO2+njll wXlK1HvEeT1FhgLj7F4U41kY7oP5x8WdrChQ3JQENkE0sNZae2UdAj6//3NnpvI7IXOO /vITC+omx+gJThlafA1ZFN/Y91pi+cCLm9WIkVaxiayMlDGMXJumDQTf4oXZMBoFVq99 bdTjK+Yzamte5icsoewE6kzz5HhSSMudMhni4QX7zxutL36NHVK2q948o/z50LIIev5J 2DDA== X-Forwarded-Encrypted: i=1; AJvYcCUbRJDkqMCwIzP2lkQIF4WqG80pzGUTOiuffhZhe1DuMTttTjBUxXd5NfgPpK5wjFnjEBmrCfELAYKO724/@vger.kernel.org, AJvYcCUsPrCCnmvaQxpo4gC8yrF3L9S2/cdIqkffOo0AKb+DsrpkcrxErOw1QS+sAAJ/EOTQhm2IKSrv@vger.kernel.org, AJvYcCXX87igfdtW9081sFN7V2p+gnKHIJs8Ztp7UiD9qaOHkXVHHQZCcbRg1ihl2c+QjfCdtxPdQFpuxRi6n19q@vger.kernel.org X-Gm-Message-State: AOJu0YzeX7scgDpC90jRWLEDy41tWUyWjgsvphSjm5AYowrrkFgTYCsi Ln2nU9pNGggw583bEwiouS9rcux0OpVIo6wYmVlO5HLloDa08uJbvX2Kn5SP X-Google-Smtp-Source: AGHT+IGKkbd3xJEakgda96Mzg7E21a6ZE9bsKsHRDvZzyTa8MLym/gUdPLpgQwzRTLIL4veRP+kBKw== X-Received: by 2002:a05:6a20:9f0f:b0:1d4:fac8:966 with SMTP id adf61e73a8af0-1d6dfa27e8emr889256637.10.1727992684786; Thu, 03 Oct 2024 14:58:04 -0700 (PDT) Received: from ryzen.lan ([2601:644:8200:dab8::a86]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71dd9d6e67esm1863026b3a.39.2024.10.03.14.58.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2024 14:58:04 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCH 5/5] documentation: use nvmem-layout in examples Date: Thu, 3 Oct 2024 14:57:46 -0700 Message-ID: <20241003215746.275349-6-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241003215746.275349-1-rosenp@gmail.com> References: <20241003215746.275349-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" nvmem-cells are deprecated and replaced with nvmem-layout. For these examples, replace. They're not relevant to the main point of the document anyway. Signed-off-by: Rosen Penev --- .../mtd/partitions/qcom,smem-part.yaml | 19 +++++++++++-------- .../bindings/net/marvell,aquantia.yaml | 13 ++++++++----- 2 files changed, 19 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-par= t.yaml b/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.ya= ml index 1c2b4e780ca9..8ae149534b23 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml @@ -45,17 +45,20 @@ examples: compatible =3D "qcom,smem-part"; =20 partition-art { - compatible =3D "nvmem-cells"; - #address-cells =3D <1>; - #size-cells =3D <1>; label =3D "0:art"; =20 - macaddr_art_0: macaddr@0 { - reg =3D <0x0 0x6>; - }; + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + macaddr_art_0: macaddr@0 { + reg =3D <0x0 0x6>; + }; =20 - macaddr_art_6: macaddr@6 { - reg =3D <0x6 0x6>; + macaddr_art_6: macaddr@6 { + reg =3D <0x6 0x6>; + }; }; }; }; diff --git a/Documentation/devicetree/bindings/net/marvell,aquantia.yaml b/= Documentation/devicetree/bindings/net/marvell,aquantia.yaml index 9854fab4c4db..f57a6e7d0049 100644 --- a/Documentation/devicetree/bindings/net/marvell,aquantia.yaml +++ b/Documentation/devicetree/bindings/net/marvell,aquantia.yaml @@ -98,15 +98,18 @@ examples: /* ... */ =20 partition@650000 { - compatible =3D "nvmem-cells"; label =3D "0:ethphyfw"; reg =3D <0x650000 0x80000>; read-only; - #address-cells =3D <1>; - #size-cells =3D <1>; =20 - aqr_fw: aqr_fw@0 { - reg =3D <0x0 0x5f42a>; + nvmem-layout { + compatible =3D "fixed-layout" + #address-cells =3D <1>; + #size-cells =3D <1>; + + aqr_fw: aqr_fw@0 { + reg =3D <0x0 0x5f42a>; + }; }; }; =20 --=20 2.46.2