From nobody Thu Nov 28 08:26:10 2024 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4A9E1AB506; Thu, 3 Oct 2024 17:01:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727974896; cv=none; b=o+qoFOdcugS6Ma1UzzrZ6uI0IkP66/XnsPtLH7kNz8/vV5RxNLLN4MqtP7xknbU4c+rcZV7Tj6SPM1Qlk9mqG5xXsYSWNrOojk1N3DWkwQ1U2M/EKV81uhM9gVy6Xt4geCElimdmzBHtcLLR1PKUlU7l9czZuc4Cf1okHaeMbnM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727974896; c=relaxed/simple; bh=oiOYHR3d4RoyWI3MaPFRg53fp+uprCbyUtfxMTPBMRU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=H8Xaknc1EzCa0IKXq+DOc2eJzEIT9EoQfqXOlTkC0aQhy2se6qg/x7bgfVQk5aUephp6NDrwJR0WF1IKaoiTP2c1ileksrAzohJ64HGv2Kd8pxpmWCZte4vUPmW3myrb6RTrzPwWb4TjsUWe1LH7RkOFFXW7GGxmt5BlrWuVp8Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=LzZn+gWS; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="LzZn+gWS" Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 493H1J8e008885; Thu, 3 Oct 2024 12:01:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1727974879; bh=tj+udxRt59HTIlu943j0s/KqJp2ZLN/fW2bY75qirRs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LzZn+gWSBYS6RApR12u008YD0ECt/oLMUBk0wLh+SnAW8KsuqB3/kabxeInVE6fd6 XI1kV88aFQn3LfUDSbKuRwqAARRwrmDZVFgiolwLJn3cBgjUP7/i8qzzrFe2Y0MfcM d0hWO1hF9xaQkNVM+OJ++6lFLMmZYDuhk1hXaUeo= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTP id 493H1JbV083232; Thu, 3 Oct 2024 12:01:19 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 3 Oct 2024 12:01:18 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 3 Oct 2024 12:01:18 -0500 Received: from ula0226330.dhcp.ti.com (ula0226330.dhcp.ti.com [128.247.81.173] (may be forged)) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 493H1IJa034882; Thu, 3 Oct 2024 12:01:18 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Andrew Davis Subject: [PATCH v12 1/5] arm64: dts: ti: k3-am62: Add M4F remoteproc node Date: Thu, 3 Oct 2024 12:01:14 -0500 Message-ID: <20241003170118.24932-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241003170118.24932-1-afd@ti.com> References: <20241003170118.24932-1-afd@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" From: Hari Nagalla The AM62x SoCs of the TI K3 family have a Cortex M4F core in the MCU domain. This core can be used by non safety applications as a remote processor. When used as a remote processor with virtio/rpmessage IPC, two carveout reserved memory nodes are needed. Disable by default as this node is not complete until mailbox data is provided in the board level DT. Signed-off-by: Hari Nagalla Signed-off-by: Andrew Davis Tested-by: Wadim Egorov --- arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/= ti/k3-am62-mcu.dtsi index bb43a411f59b2..68e906796aefe 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi @@ -174,4 +174,17 @@ mcu_mcan1: can@4e18000 { bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; status =3D "disabled"; }; + + mcu_m4fss: m4fss@5000000 { + compatible =3D "ti,am64-m4fss"; + reg =3D <0x00 0x5000000 0x00 0x30000>, + <0x00 0x5040000 0x00 0x10000>; + reg-names =3D "iram", "dram"; + resets =3D <&k3_reset 9 1>; + firmware-name =3D "am62-mcu-m4f0_0-fw"; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <9>; + ti,sci-proc-ids =3D <0x18 0xff>; + status =3D "disabled"; + }; }; --=20 2.39.2