From nobody Thu Nov 28 08:53:10 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 39BD71A3042; Thu, 3 Oct 2024 15:29:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727969366; cv=none; b=CGgDmJn5hqnzC8r/+hxvkdYWbDYUKIefr9IApQnTEujKnZT6Z0Gxa55+ZbWdDXGh9KBIthroJO0DkssHDUr6GSbV9cUdR8e15+V4ogUPqxUwsMRMI9frp1gVKtyi3e2iJl/MIRIpZEUquBlD8h+IZskse15vzVSzJVan4UZy64U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727969366; c=relaxed/simple; bh=GKgg1zsyKJ9sd8dZXgkcJMYDWmzgqiGUKV82pTnGx5I=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=bQiQPelITUWp+ttCVgVJkER6/dwXa2LzGgLekk3M/+KlqSbGYC5utz7cckgZS3XucRZQ7yjhLyITuxcjUZxXm/3Jjd3e6C+ZLMDd1lqVGpc4OiWIfGwKIVevFuCWqFrxPJCW6qzF+XNGK2RGIFmszipvbsxjRE8bKjBY3rj9zTM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 245E014BF; Thu, 3 Oct 2024 08:29:53 -0700 (PDT) Received: from e119884-lin.cambridge.arm.com (e119884-lin.cambridge.arm.com [10.1.196.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AF29F3F640; Thu, 3 Oct 2024 08:29:20 -0700 (PDT) From: Vincenzo Frascino To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org Cc: Vincenzo Frascino , Andy Lutomirski , Thomas Gleixner , "Jason A . Donenfeld" , Christophe Leroy , Michael Ellerman , Nicholas Piggin , Naveen N Rao , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Theodore Ts'o , Arnd Bergmann , Andrew Morton , Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers Subject: [PATCH v3 1/2] drm: Fix fault format Date: Thu, 3 Oct 2024 16:29:09 +0100 Message-Id: <20241003152910.3287259-2-vincenzo.frascino@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241003152910.3287259-1-vincenzo.frascino@arm.com> References: <20241003152910.3287259-1-vincenzo.frascino@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Fault is of type u32 and PAGE_MASK is type agnostic, hence the correct format for address should be %x not %lx otherwise: drivers/gpu/drm/i915/gt/intel_gt_print.h:29:36: error: format =E2=80=98%lx= =E2=80=99 expects argument of type =E2=80=98long unsigned int=E2=80=99, but argument 6 has ty= pe =E2=80=98u32=E2=80=99 {aka =E2=80=98unsigned int=E2=80=99} [-Werror=3Dformat=3D] 29 | drm_dbg(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, | ^~~~~~~~ include/drm/drm_print.h:424:39: note: in definition of macro =E2=80=98drm_d= ev_dbg=E2=80=99 424 | __drm_dev_dbg(NULL, dev, cat, fmt, ##__VA_ARGS__) | ^~~ include/drm/drm_print.h:524:33: note: in expansion of macro =E2=80=98drm_db= g_driver=E2=80=99 524 | #define drm_dbg(drm, fmt, ...) drm_dbg_driver(drm, fmt, ##__VA_ARG= S__) | ^~~~~~~~~~~~~~ linux/drivers/gpu/drm/i915/gt/intel_gt_print.h:29:9: note: in expansion of = macro =E2=80=98drm_dbg=E2=80=99 29 | drm_dbg(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, | ^~~~~~~ drivers/gpu/drm/i915/gt/intel_gt.c:310:25: note: in expansion of macro =E2= =80=98gt_dbg=E2=80=99 310 | gt_dbg(gt, "Unexpected fault\n" | ^~~~~~ Fix address format. Cc: Arnd Bergmann Cc: Andy Lutomirski Cc: Thomas Gleixner Cc: Jason A. Donenfeld Suggested-by: Christophe Leroy Signed-off-by: Vincenzo Frascino --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/i= ntel_gt.c index a6c69a706fd7..352ef5e1c615 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -308,7 +308,7 @@ static void gen6_check_faults(struct intel_gt *gt) fault =3D GEN6_RING_FAULT_REG_READ(engine); if (fault & RING_FAULT_VALID) { gt_dbg(gt, "Unexpected fault\n" - "\tAddr: 0x%08lx\n" + "\tAddr: 0x%08x\n" "\tAddress space: %s\n" "\tSource ID: %d\n" "\tType: %d\n", --=20 2.34.1