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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241003-dt-binding-display-msm-merge-v1-1-91ab08fc76a2@linaro.org> References: <20241003-dt-binding-display-msm-merge-v1-0-91ab08fc76a2@linaro.org> In-Reply-To: <20241003-dt-binding-display-msm-merge-v1-0-91ab08fc76a2@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Neil Armstrong , Krishna Manikandan Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5123; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; bh=I5gkxxh+/Kn7rSd5JE9ZVp0kaBODXFkfmbSKaf1DYHc=; b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBm/lJgpCz5PczWvVC4MOIIKhlQ6KLXaZenlrYJI drKKpzFNpOJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCZv5SYAAKCRDBN2bmhouD 10fcD/4547yeLqXfKNqq/CjO1tHYFMiWiDA6JArchwq/G4NWZyVC+Xq8hEdf7u3a7ycQb0rs3cL 0huBzw5X9Ufag9yLBEM3iS8noXXPgJuWSh/WqX8DTWpOvg1E3Bu8+w55lf/zy8GuUqGF4h1o7W0 qOmxHVECt5X4Ny+VxP5b6kxsezf4wUbVipwfW45ykmdqijK6D2qgrfF2CZMB+/aOZkVnUdavGtJ gjMIYp5Pf/r9uGsCitHgUB0rULcJEippVF59cFhZdGD9ESFbSuuyS/CdaFmO9bmN3mPq/7UpD+i kA8s7BwUumRlLjkhjAnSfC1+sg6vJln4nvp84XpySm80dTf6rRC8D3zfBlk2leVrq+eKr/4r8bF 7x/I6rPiTHgPRHpsiwiVyR9BpzxnmvjQeCjlCHlGxW3Db+O3bbP6xvezxKYnHd6DTWm9ydIlNrU UpONUCnuUvGy/SGhA6la9MlpRTcPlVCywjDAWVXW+U9ninUzNQqctGNSigCb9sgcp/oQEhgdrbG XShEwlMGR1T1Co9HkghLDyQVMIqNGSc7htte0RjHVWqQadeLFyE/O+o2yA98PTrhN/PKR0A8Zj3 DNK0MrBAfS0fTQlkz0RNU2LrYSvNF51+fkpAQexMN5NMDH6zif5WdABJIKysAlQllhnMYh/63wo KmkfVBAKxFOlbzA== X-Developer-Key: i=krzysztof.kozlowski@linaro.org; a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Split of the bindings was artificial and not helping - we end up with multiple binding files for very similar devices thus increasing the chances of using different order of reg and clocks entries. Unify DPU bindings of SC7280 and SC8280XP, because they are the same. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) --- .../bindings/display/msm/qcom,sc7280-dpu.yaml | 5 +- .../bindings/display/msm/qcom,sc8280xp-dpu.yaml | 122 -----------------= ---- 2 files changed, 4 insertions(+), 123 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.= yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml index b0fbe86219d1..fab7a3b9a20e 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml @@ -7,13 +7,16 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Display DPU on SC7280 =20 maintainers: + - Bjorn Andersson - Krishna Manikandan =20 $ref: /schemas/display/msm/dpu-common.yaml# =20 properties: compatible: - const: qcom,sc7280-dpu + enum: + - qcom,sc7280-dpu + - qcom,sc8280xp-dpu =20 reg: items: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dp= u.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.ya= ml deleted file mode 100644 index d19e3bec4600..000000000000 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml +++ /dev/null @@ -1,122 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-dpu.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm SC8280XP Display Processing Unit - -maintainers: - - Bjorn Andersson - -description: - Device tree bindings for SC8280XP Display Processing Unit. - -$ref: /schemas/display/msm/dpu-common.yaml# - -properties: - compatible: - const: qcom,sc8280xp-dpu - - reg: - items: - - description: Address offset and size for mdp register set - - description: Address offset and size for vbif register set - - reg-names: - items: - - const: mdp - - const: vbif - - clocks: - items: - - description: Display hf axi clock - - description: Display sf axi clock - - description: Display ahb clock - - description: Display lut clock - - description: Display core clock - - description: Display vsync clock - - clock-names: - items: - - const: bus - - const: nrt_bus - - const: iface - - const: lut - - const: core - - const: vsync - -unevaluatedProperties: false - -examples: - - | - #include - #include - #include - #include - #include - - display-controller@ae01000 { - compatible =3D "qcom,sc8280xp-dpu"; - reg =3D <0x0ae01000 0x8f000>, - <0x0aeb0000 0x2008>; - reg-names =3D "mdp", "vbif"; - - clocks =3D <&gcc GCC_DISP_HF_AXI_CLK>, - <&gcc GCC_DISP_SF_AXI_CLK>, - <&dispcc0 DISP_CC_MDSS_AHB_CLK>, - <&dispcc0 DISP_CC_MDSS_MDP_LUT_CLK>, - <&dispcc0 DISP_CC_MDSS_MDP_CLK>, - <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>; - clock-names =3D "bus", - "nrt_bus", - "iface", - "lut", - "core", - "vsync"; - - assigned-clocks =3D <&dispcc0 DISP_CC_MDSS_MDP_CLK>, - <&dispcc0 DISP_CC_MDSS_VSYNC_CLK>; - assigned-clock-rates =3D <460000000>, - <19200000>; - - operating-points-v2 =3D <&mdp_opp_table>; - power-domains =3D <&rpmhpd SC8280XP_MMCX>; - - interrupt-parent =3D <&mdss0>; - interrupts =3D <0>; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - endpoint { - remote-endpoint =3D <&mdss0_dp0_in>; - }; - }; - - port@4 { - reg =3D <4>; - endpoint { - remote-endpoint =3D <&mdss0_dp1_in>; - }; - }; - - port@5 { - reg =3D <5>; - endpoint { - remote-endpoint =3D <&mdss0_dp3_in>; - }; - }; - - port@6 { - reg =3D <6>; - endpoint { - remote-endpoint =3D <&mdss0_dp2_in>; - }; - }; - }; - }; -... --=20 2.43.0