From nobody Thu Nov 28 11:25:04 2024 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9ED181CF5F6; Wed, 2 Oct 2024 12:09:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727870990; cv=none; b=OJ6rae/C2rwF95DcF6eIOfSpC+DDPP4knqh6NmuciX6FIhpJuZyhJ/zjxVsSaljjLO+bSvJY4tAez79fYdf5cauSBw+jH6/3FeTwgI0EuJDuLTv57X92Q79nHQ6NoH96FPegAY4hGywiP9wrd1wCHedGecMyhIA7t+QqxNsElMU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727870990; c=relaxed/simple; bh=5tYspHPCaZI/fpglnT/4J6pWnb3ekyo+y+Z36wLL0Ic=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=csiC/r2QutOgVe5Wo+vCAWT6vIOFDYWCyclQqtqvrjzHij7zDmutXhmDngMiQ7V8EgW+XA4FUqfHu3I/fwjvalGhGHJ2lY8RqMbfIgHG1fuZh1hDhZDJZmTaUEpVN2TcL3zc1kFBCfnwaT7js0lDsdvEmmSq6RopxwyvA7tArxA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=getgoogleoff.me; spf=pass smtp.mailfrom=getgoogleoff.me; dkim=pass (2048-bit key) header.d=getgoogleoff.me header.i=@getgoogleoff.me header.b=ZxSNOfMz; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=getgoogleoff.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=getgoogleoff.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=getgoogleoff.me header.i=@getgoogleoff.me header.b="ZxSNOfMz" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 0702E23D11; Wed, 2 Oct 2024 14:09:47 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id z-5iOHiwgDzf; Wed, 2 Oct 2024 14:09:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=getgoogleoff.me; s=mail; t=1727870986; bh=5tYspHPCaZI/fpglnT/4J6pWnb3ekyo+y+Z36wLL0Ic=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ZxSNOfMzwTVQo3K9MT1Idm0MvTUyuFvQIo+7kQnX+exTEOMtBBsA9h7pxm0fvrd37 nOyIEYTd6ZVtlUa9S3nZ2eHpq6gqlcUK6PXNm33IoM4MSgQgnA1zG8RwUWyAJiaWVy wVEEf4Gf4TVugpamhUT2HMWa4g5RIvty/GnSC1vZmbAxr3Efp7lDQB1eruroy9Ehrq dRbqjMwe2BCXZL7x5AAjP2fSYpFlEM4SBsedqmtXmAJ4UjSb0CJjI/5+5u6Vw/cEl5 cC467ZnXZfZMLbMicqJ7bdeNwDdgpCJSibvG/xo3ebHSuLKSQorI3p5E3yJ/krUi/e iifUDUQWbIypg== From: Karl Chan To: linux-arm-msm@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Karl Chan Subject: [PATCH 1/3] arm64: dts: qcom: add Linksys EA9350 V3 Date: Wed, 2 Oct 2024 20:08:02 +0800 Message-ID: <20241002120804.25068-2-exxxxkc@getgoogleoff.me> In-Reply-To: <20241002120804.25068-1-exxxxkc@getgoogleoff.me> References: <20241002120804.25068-1-exxxxkc@getgoogleoff.me> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add device tree source for Linksys EA9350 V3 which is a WiFi router based o= n the IPQ5018 SoC. As of now , only the UART,USB,USB LED,buttons is working.The front PWM LED = require the IPQ PWM driver.Therefore the PWM LED isn't configed in the tree. Also The original firmware from Linksys can only boot ARM32 kernels. As of now There seems to be no way to boot ARM64 kernels on those device. However, it is possible to use this device tree by compiling an ARM32 kerne= l instead. Signed-off-by: Karl Chan --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/ipq5018-linksys-jamaica.dts | 114 ++++++++++++++++++ 2 files changed, 115 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-linksys-jamaica.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index ae002c7cf126..9ddc1b695478 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-ifc6640.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-rdp432-c2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-tplink-archer-ax55-v1.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-linksys-jamaica.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5332-rdp441.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5332-rdp442.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5332-rdp468.dtb diff --git a/arch/arm64/boot/dts/qcom/ipq5018-linksys-jamaica.dts b/arch/ar= m64/boot/dts/qcom/ipq5018-linksys-jamaica.dts new file mode 100644 index 000000000000..b6cb88884193 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq5018-linksys-jamaica.dts @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause + +/dts-v1/; + +/* + * NOTE: The original firmware from Linksys can only boot ARM32 kernels. + * + * As of now There seems to be no way to boot ARM64 kernels on those devic= e. + * + * However, it is possible to use this device tree by compiling an ARM32 k= ernel + * instead. For clarity and build testing this device tree is maintained n= ext + * to the other IPQ5018 device trees. However, it is actually used through + * arch/arm/boot/dts/qcom/qcom-ipq5018-linksys-jamaica.dts + */ + +#include "ipq5018.dtsi" +#include +#include +#include + + +/ { + model =3D "Linksys EA9350 V3"; + compatible =3D "linksys,jamaica", "qcom,ipq5018"; + + aliases { + serial0 =3D &blsp1_uart1; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-0 =3D <&led_pins>; + pinctrl-names =3D "default"; + + led-0 { + color =3D ; + function =3D LED_FUNCTION_USB; + gpios =3D <&tlmm 19 GPIO_ACTIVE_HIGH>; + }; + + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <&button_pins>; + pinctrl-names =3D "default"; + + button-0 { + label =3D "reset"; + linux,code =3D ; + gpios =3D <&tlmm 28 GPIO_ACTIVE_LOW>; + debounce-interval =3D <60>; + }; + + button-1 { + label =3D "wps"; + linux,code =3D ; + gpios =3D <&tlmm 27 GPIO_ACTIVE_LOW>; + debounce-interval =3D <60>; + }; + }; + +}; + +&blsp1_uart1 { + pinctrl-0 =3D <&uart1_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&sleep_clk { + clock-frequency =3D <32000>; +}; + +&usbphy0 { + status =3D "okay"; +}; + +&usb { + status =3D "okay"; +}; + +&usb_dwc { + dr_mode =3D "host"; +}; + +&tlmm { + button_pins: button-pins-state { + pins =3D "gpio27", "gpio28"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-pull-up; + }; + + led_pins: led-pins-state { + pins =3D "gpio19"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + +}; + +&sleep_clk { + clock-frequency =3D <32000>; +}; + +&xo_board_clk { + clock-frequency =3D <24000000>; +}; --=20 2.46.1