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CP_MPP[40] provides reference clock for dsa switch and ethernet phy on Clearfog Pro, wheras MPP[41] controls efuse programming voltage "VHV". Update the cp0 mdio pinctrl node to specify mpp0, mpp1. Cc: Signed-off-by: Josua Mayer --- arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi b/arch/arm64/bo= ot/dts/marvell/cn9130-sr-som.dtsi index 4676e3488f54d..cb8d54895a777 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi @@ -136,7 +136,7 @@ cp0_i2c0_pins: cp0-i2c0-pins { }; =20 cp0_mdio_pins: cp0-mdio-pins { - marvell,pins =3D "mpp40", "mpp41"; + marvell,pins =3D "mpp0", "mpp1"; marvell,function =3D "ge"; }; =20 --- base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc change-id: 20241002-cn9130-som-mdio-4a519e6dc7df Sincerely, --=20 Josua Mayer